1 /*
2 * Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #ifndef __SOC_H__
8 #define __SOC_H__
9 #include <soc/dport_reg.h>
10 #include <soc/rtc_cntl_reg.h>
11 #include <soc/soc_caps.h>
12 #include <esp32/rom/ets_sys.h>
13 #include <esp32/rom/spi_flash.h>
14
15 #include <zephyr/types.h>
16 #include <stdbool.h>
17 #include <zephyr/arch/xtensa/arch.h>
18
19 #include <xtensa/core-macros.h>
20 #include <esp32/clk.h>
21
22 void __esp_platform_start(void);
23
esp32_set_mask32(uint32_t v,uint32_t mem_addr)24 static inline void esp32_set_mask32(uint32_t v, uint32_t mem_addr)
25 {
26 sys_write32(sys_read32(mem_addr) | v, mem_addr);
27 }
28
esp32_clear_mask32(uint32_t v,uint32_t mem_addr)29 static inline void esp32_clear_mask32(uint32_t v, uint32_t mem_addr)
30 {
31 sys_write32(sys_read32(mem_addr) & ~v, mem_addr);
32 }
33
esp_core_id(void)34 static inline uint32_t esp_core_id(void)
35 {
36 uint32_t id;
37
38 __asm__ volatile (
39 "rsr.prid %0\n"
40 "extui %0,%0,13,1" : "=r" (id));
41 return id;
42 }
43
44 extern void esp_rom_intr_matrix_set(int cpu_no, uint32_t model_num, uint32_t intr_num);
45
46 extern int esp_rom_gpio_matrix_in(uint32_t gpio, uint32_t signal_index,
47 bool inverted);
48 extern int esp_rom_gpio_matrix_out(uint32_t gpio, uint32_t signal_index,
49 bool out_inverted,
50 bool out_enabled_inverted);
51
52 extern void esp_rom_uart_attach(void);
53 extern void esp_rom_uart_tx_wait_idle(uint8_t uart_no);
54 extern int esp_rom_uart_tx_one_char(uint8_t chr);
55 extern int esp_rom_uart_rx_one_char(uint8_t *chr);
56
57 extern void esp_rom_Cache_Flush(int cpu);
58 extern void esp_rom_Cache_Read_Enable(int cpu);
59 extern void esp_rom_ets_set_appcpu_boot_addr(void *addr);
60
61 /* ROM functions which read/write internal i2c control bus for PLL, APLL */
62 extern uint8_t esp_rom_i2c_readReg(uint8_t block, uint8_t host_id, uint8_t reg_add);
63 extern void esp_rom_i2c_writeReg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data);
64
65 /* ROM information related to SPI Flash chip timing and device */
66 extern esp_rom_spiflash_chip_t g_rom_flashchip;
67 extern uint8_t g_rom_spiflash_dummy_len_plus[];
68
69 #endif /* __SOC_H__ */
70
