1 /*
2  * Copyright (c) 2018 Foundries.io Ltd
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /*
8  * Extra definitions required for CONFIG_RISCV_SOC_CONTEXT_SAVE.
9  */
10 
11 #ifndef SOC_RISCV32_OPENISA_RV32M1_SOC_CONTEXT_H_
12 #define SOC_RISCV32_OPENISA_RV32M1_SOC_CONTEXT_H_
13 
14 #ifdef CONFIG_SOC_OPENISA_RV32M1_RI5CY
15 
16 /* Extra state for RI5CY hardware loop registers. */
17 #define SOC_ESF_MEMBERS					\
18 	uint32_t lpstart0;					\
19 	uint32_t lpend0;						\
20 	uint32_t lpcount0;					\
21 	uint32_t lpstart1;					\
22 	uint32_t lpend1;						\
23 	uint32_t lpcount1
24 
25 /* Initial saved state. */
26 #define SOC_ESF_INIT						\
27 	0,						\
28 	0,						\
29 	0,						\
30 	0,						\
31 	0,						\
32 	0
33 
34 #endif /* CONFIG_SOC_OPENISA_RV32M1_RI5CY */
35 
36 #endif /* SOC_RISCV32_OPENISA_RV32M1_SOC_CONTEXT_H_ */
37