1# TI SimpleLink CC3220SF SoC
2
3# SPDX-License-Identifier: Apache-2.0
4
5if SOC_CC3220SF
6
7config SOC
8	default "cc3220sf"
9
10config NUM_IRQS
11	# must be >= the highest interrupt number used
12	# This includes the NWP interrupt
13	default 178
14
15config SYS_CLOCK_HW_CYCLES_PER_SEC
16	default 80000000
17
18config ROM_START_OFFSET
19	default 0x800 if XIP
20	default 0x0   if !XIP
21
22# Override the setting in misc/Kconfig to allow full use of SRAM:
23config BOOTLOADER_SRAM_SIZE
24	default 0 if !XIP
25
26if !XIP
27config FLASH_SIZE
28	default 0
29config FLASH_BASE_ADDRESS
30	default 0
31endif
32
33endif # SOC_CC3220SF
34