1 /*
2  * Copyright (c) 2018 Linaro Limited
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /**
8  * @file
9  * @brief System/hardware module for STM32WB processor
10  */
11 
12 #include <zephyr/device.h>
13 #include <zephyr/init.h>
14 #include <zephyr/logging/log.h>
15 
16 #include <cmsis_core.h>
17 
18 #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
19 LOG_MODULE_REGISTER(soc);
20 
21 /**
22  * @brief Perform basic hardware initialization at boot.
23  *
24  * This needs to be run from the very beginning.
25  * So the init priority has to be 0 (zero).
26  *
27  * @return 0
28  */
stm32wb_init(void)29 static int stm32wb_init(void)
30 {
31 	/* Update CMSIS SystemCoreClock variable (HCLK) */
32 	/* At reset, system core clock is set to 4 MHz from MSI */
33 	SystemCoreClock = 4000000;
34 
35 	/* Set C2 Power Mode to shutdown */
36 	/* It will be updated by C2 when required */
37 	LL_C2_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN);
38 
39 	return 0;
40 }
41 
42 SYS_INIT(stm32wb_init, PRE_KERNEL_1, 0);
43