1 /* 2 * Copyright (c) 2021 Linaro Limited 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 /** 8 * @file 9 * @brief System/hardware module for STM32U5 processor 10 */ 11 12 #include <zephyr/device.h> 13 #include <zephyr/init.h> 14 #include <stm32_ll_bus.h> 15 #include <stm32_ll_pwr.h> 16 #include <stm32_ll_icache.h> 17 #include <zephyr/logging/log.h> 18 19 #include <cmsis_core.h> 20 21 #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL 22 LOG_MODULE_REGISTER(soc); 23 24 /** 25 * @brief Perform basic hardware initialization at boot. 26 * 27 * This needs to be run from the very beginning. 28 * So the init priority has to be 0 (zero). 29 * 30 * @return 0 31 */ stm32u5_init(void)32static int stm32u5_init(void) 33 { 34 /* Enable instruction cache in 1-way (direct mapped cache) */ 35 LL_ICACHE_SetMode(LL_ICACHE_1WAY); 36 LL_ICACHE_Enable(); 37 38 /* Update CMSIS SystemCoreClock variable (HCLK) */ 39 /* At reset, system core clock is set to 4 MHz from MSIS */ 40 SystemCoreClock = 4000000; 41 42 /* Enable PWR */ 43 LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_PWR); 44 45 /* Disable USB Type-C dead battery pull-down behavior */ 46 LL_PWR_DisableUCPDDeadBattery(); 47 48 /* Power Configuration */ 49 #if defined(CONFIG_POWER_SUPPLY_DIRECT_SMPS) 50 LL_PWR_SetRegulatorSupply(LL_PWR_SMPS_SUPPLY); 51 #elif defined(CONFIG_POWER_SUPPLY_LDO) 52 LL_PWR_SetRegulatorSupply(LL_PWR_LDO_SUPPLY); 53 #else 54 #error "Unsupported power configuration" 55 #endif 56 57 return 0; 58 } 59 60 SYS_INIT(stm32u5_init, PRE_KERNEL_1, 0); 61
