1 /*
2  * Copyright (c) 2016 Open-RnD Sp. z o.o.
3  * Copyright (c) 2016 Linaro Limited.
4  *
5  * SPDX-License-Identifier: Apache-2.0
6  */
7 
8 /**
9  * @file
10  * @brief System/hardware module for STM32F4 processor
11  */
12 
13 #include <zephyr/device.h>
14 #include <zephyr/init.h>
15 
16 #include <cmsis_core.h>
17 #include <stm32_ll_system.h>
18 
19 /**
20  * @brief Perform basic hardware initialization at boot.
21  *
22  * This needs to be run from the very beginning.
23  * So the init priority has to be 0 (zero).
24  *
25  * @return 0
26  */
st_stm32f4_init(void)27 static int st_stm32f4_init(void)
28 {
29 	/* Enable ART Flash cache accelerator for both instruction and data */
30 	LL_FLASH_EnableInstCache();
31 	LL_FLASH_EnableDataCache();
32 
33 	/* Update CMSIS SystemCoreClock variable (HCLK) */
34 	/* At reset, system core clock is set to 16 MHz from HSI */
35 	SystemCoreClock = 16000000;
36 
37 	return 0;
38 }
39 
40 SYS_INIT(st_stm32f4_init, PRE_KERNEL_1, 0);
41