1 /*
2  * Copyright (c) 2016 RnDity Sp. z o.o.
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /**
8  * @file
9  * @brief System/hardware module for STM32F3 processor
10  */
11 
12 #include <zephyr/device.h>
13 #include <zephyr/init.h>
14 #include <stm32_ll_system.h>
15 
16 #include <cmsis_core.h>
17 
18 /**
19  * @brief Perform basic hardware initialization at boot.
20  *
21  * This needs to be run from the very beginning.
22  * So the init priority has to be 0 (zero).
23  *
24  * @return 0
25  */
stm32f3_init(void)26 static int stm32f3_init(void)
27 {
28 	/* Update CMSIS SystemCoreClock variable (HCLK) */
29 	/* At reset, system core clock is set to 8 MHz from HSI */
30 	SystemCoreClock = 8000000;
31 
32 	/* Allow reflashing the board */
33 	LL_DBGMCU_EnableDBGSleepMode();
34 
35 	return 0;
36 }
37 
38 SYS_INIT(stm32f3_init, PRE_KERNEL_1, 0);
39