1 /*
2  * Copyright (c) 2018 qianfan Zhao <qianfanguijin@163.com>
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /**
8  * @file
9  * @brief System/hardware module for stm32f2 processor
10  */
11 
12 #include <zephyr/kernel.h>
13 #include <zephyr/device.h>
14 #include <zephyr/init.h>
15 #include <soc.h>
16 #include <stm32_ll_system.h>
17 #include <zephyr/linker/linker-defs.h>
18 #include <string.h>
19 
20 #include <cmsis_core.h>
21 
22 /**
23  * @brief Perform basic hardware initialization at boot.
24  *
25  * This needs to be run from the very beginning.
26  * So the init priority has to be 0 (zero).
27  *
28  * @return 0
29  */
stm32f2_init(void)30 static int stm32f2_init(void)
31 {
32 	/* Enable ART Flash cache accelerator for both Instruction and Data */
33 	LL_FLASH_EnableInstCache();
34 	LL_FLASH_EnableDataCache();
35 
36 	/* Update CMSIS SystemCoreClock variable (HCLK) */
37 	/* At reset, system core clock is set to 16 MHz from HSI */
38 	SystemCoreClock = 16000000;
39 
40 	return 0;
41 }
42 
43 SYS_INIT(stm32f2_init, PRE_KERNEL_1, 0);
44