1 /*
2 * Copyright 2022 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <zephyr/kernel.h>
8 #include <zephyr/device.h>
9 #include <zephyr/init.h>
10 #include <cmsis_core.h>
11 #include <zephyr/sys/barrier.h>
12
13 #include <OsIf.h>
14
z_arm_platform_init(void)15 void z_arm_platform_init(void)
16 {
17 /* enable peripheral port access at EL1 and EL0 */
18 __asm__ volatile("mrc p15, 0, r0, c15, c0, 0\n");
19 __asm__ volatile("orr r0, #1\n");
20 __asm__ volatile("mcr p15, 0, r0, c15, c0, 0\n");
21 barrier_dsync_fence_full();
22 barrier_isync_fence_full();
23
24 if (IS_ENABLED(CONFIG_ICACHE)) {
25 if (!(__get_SCTLR() & SCTLR_I_Msk)) {
26 L1C_InvalidateICacheAll();
27 __set_SCTLR(__get_SCTLR() | SCTLR_I_Msk);
28 barrier_isync_fence_full();
29 }
30 }
31
32 if (IS_ENABLED(CONFIG_DCACHE)) {
33 if (!(__get_SCTLR() & SCTLR_C_Msk)) {
34 L1C_InvalidateDCacheAll();
35 __set_SCTLR(__get_SCTLR() | SCTLR_C_Msk);
36 barrier_dsync_fence_full();
37 }
38 }
39 }
40
soc_init(void)41 static int soc_init(void)
42 {
43 OsIf_Init(NULL);
44
45 return 0;
46 }
47
48 SYS_INIT(soc_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
49