1# NXP S32K MCUs family
2
3# Copyright 2023 NXP
4# SPDX-License-Identifier: Apache-2.0
5
6choice
7	prompt "NXP S32K MCUs family SoC Selection"
8	depends on SOC_SERIES_S32K3_M7
9
10config SOC_S32K344_M7
11	bool "SOC_S32K_M7"
12	select HAS_NXP_S32_HAL
13
14endchoice
15
16if SOC_SERIES_S32K3_M7
17
18config SOC_PART_NUMBER_S32K344
19	bool
20
21config SOC_PART_NUMBER_S32K3
22	string
23	default "S32K344" if SOC_PART_NUMBER_S32K344
24	help
25	  This string holds the full part number of the SoC. It is a hidden option
26	  that you should not set directly. The part number selection choice defines
27	  the default value for this string.
28
29config IVT_HEADER_OFFSET
30	hex
31	depends on XIP
32	default $(dt_node_reg_addr_hex,$(dt_nodelabel_path,ivt_header))
33	help
34	  The offset address from flash base address for ivt header
35
36config IVT_HEADER_SIZE
37	hex
38	depends on XIP
39	default $(dt_node_reg_size_hex,$(dt_nodelabel_path,ivt_header))
40	help
41	  Size of ivt header region
42
43config NXP_S32_PMC_LMEN
44	bool "Last Mile regulator"
45	default y if CLOCK_CONTROL
46	help
47	  Enables the Last Mile regulator, which regulates an external 1.5V
48	  voltage on V15 down to the core and logic supply (V11 power domain),
49	  which is typically 1.1V.
50	  When enabling PLL as system clock, the PMC last mile regulator should
51	  be enabled.
52
53config NXP_S32_PMC_LMBCTLEN
54	bool "External BCTL regulator for V15"
55	depends on NXP_S32_PMC_LMEN
56	help
57	  This option must be selected if an external BJT between VDD_HV_A and
58	  V15 is used on the PCB. The base of this BJT must be connected to the
59	  VRC_CTRL pin and is controlled by the PMC to regulate a voltage of
60	  1.5V on V15 pin.
61
62endif
63