1 /*
2 * Copyright 2023 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <zephyr/kernel.h>
8 #include <zephyr/init.h>
9 #ifdef CONFIG_REBOOT
10 #include <zephyr/sys/reboot.h>
11 #endif
12
13 #include <Power_Ip.h>
14
15 #ifdef CONFIG_REBOOT
16 BUILD_ASSERT(POWER_IP_PERFORM_RESET_API == STD_ON, "Power Reset API must be enabled");
17
18 /*
19 * Overrides default weak implementation of system reboot.
20 *
21 * SYS_REBOOT_COLD (Destructive Reset):
22 * - Leads most parts of the chip, except a few modules, to reset. SRAM content
23 * is lost after this reset event.
24 * - Flash is always reset, so an updated value of the option bits is reloaded
25 * in volatile registers outside of the Flash array.
26 * - Trimming is lost.
27 * - STCU is reset and configured BISTs are executed.
28 *
29 * SYS_REBOOT_WARM (Functional Reset):
30 * - Leads all the communication peripherals and cores to reset. The communication
31 * protocols' sanity is not guaranteed and they are assumed to be reinitialized
32 * after reset. The SRAM content, and the functionality of certain modules, is
33 * preserved across functional reset.
34 * - The volatile registers are not reset; in case of a reset event, the
35 * trimming is maintained.
36 * - No BISTs are executed after functional reset.
37 */
sys_arch_reboot(int type)38 void sys_arch_reboot(int type)
39 {
40 Power_Ip_MC_RGM_ConfigType mc_rgm_cfg = { 0 };
41
42 const Power_Ip_HwIPsConfigType power_cfg = {
43 .McRgmConfigPtr = (const Power_Ip_MC_RGM_ConfigType *)&mc_rgm_cfg,
44 .PMCConfigPtr = NULL
45 };
46
47 switch (type) {
48 case SYS_REBOOT_COLD:
49 /* Destructive reset */
50 mc_rgm_cfg.ResetType = MCU_DEST_RESET;
51 Power_Ip_PerformReset(&power_cfg);
52 break;
53 case SYS_REBOOT_WARM:
54 /* Functional reset */
55 mc_rgm_cfg.ResetType = MCU_FUNC_RESET;
56 Power_Ip_PerformReset(&power_cfg);
57 break;
58 default:
59 /* Do nothing */
60 break;
61 }
62 }
63 #endif /* CONFIG_REBOOT */
64
nxp_s32_power_init(void)65 static int nxp_s32_power_init(void)
66 {
67 const Power_Ip_MC_RGM_ConfigType mc_rgm_cfg = {
68 .FuncResetOpt = 0U, /* All functional reset sources enabled */
69 .FesThresholdReset = MC_RGM_FRET_FRET(CONFIG_NXP_S32_FUNC_RESET_THRESHOLD),
70 .DesThresholdReset = MC_RGM_DRET_DRET(CONFIG_NXP_S32_DEST_RESET_THRESHOLD)
71 };
72
73 const Power_Ip_PMC_ConfigType pmc_cfg = {
74 #ifdef CONFIG_SOC_PART_NUMBER_S32K3
75 /* PMC Configuration Register (CONFIG) */
76 .ConfigRegister = PMC_CONFIG_LMEN(IS_ENABLED(CONFIG_NXP_S32_PMC_LMEN))
77 | PMC_CONFIG_LMBCTLEN(IS_ENABLED(CONFIG_NXP_S32_PMC_LMBCTLEN)),
78 #else
79 #error "SoC not supported"
80 #endif
81 };
82
83 const Power_Ip_HwIPsConfigType power_cfg = {
84 .McRgmConfigPtr = &mc_rgm_cfg,
85 .PMCConfigPtr = &pmc_cfg
86 };
87
88 Power_Ip_Init(&power_cfg);
89
90 return 0;
91 }
92
93 SYS_INIT(nxp_s32_power_init, PRE_KERNEL_1, 1);
94
