1 /*
2  * SPDX-License-Identifier: Apache-2.0
3  *
4  * Copyright (c) 2020 Linumiz
5  * Author: Parthiban Nallathambi <parthiban@linumiz.com>
6  *
7  */
8 
9 #include <xmc_scu.h>
10 #include <zephyr/kernel.h>
11 #include <zephyr/init.h>
12 #include <soc.h>
13 
14 #ifdef CONFIG_SOC_XMC4500
15 #define PMU_FLASH_WS		(0x3U)
16 #elif CONFIG_SOC_XMC4700
17 #define PMU_FLASH_WS		(0x4U)
18 #endif
19 
z_arm_platform_init(void)20 void z_arm_platform_init(void)
21 {
22 	uint32_t temp;
23 
24 	/* unaligned trap bit is enabled on reset. disable it here and set later via */
25 	/* CONFIG_TRAP_UNALIGNED_ACCESS if needed. */
26 	SCB->CCR &= ~SCB_CCR_UNALIGN_TRP_Msk;
27 
28 	/* setup flash wait state */
29 	temp = FLASH0->FCON;
30 	temp &= ~FLASH_FCON_WSPFLASH_Msk;
31 	temp |= PMU_FLASH_WS;
32 	FLASH0->FCON = temp;
33 
34 	XMC_SCU_CLOCK_SetSleepConfig(XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_SYSCLK_FPLL
35 #ifdef CONFIG_PWM_XMC4XXX_CCU4
36 				     | XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_CCU
37 #endif
38 #ifdef CONFIG_PWM_XMC4XXX_CCU8
39 				     | XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_ENABLE_CCU
40 #endif
41 	);
42 
43 	/* configure PLL & system clock */
44 	SystemCoreClockSetup();
45 }
46