1 /* 2 * Copyright (c) 2019 ML!PA Consulting GmbH 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef _ATMEL_SAME53_SOC_H_ 8 #define _ATMEL_SAME53_SOC_H_ 9 10 #ifndef _ASMLANGUAGE 11 12 #define DONT_USE_CMSIS_INIT 13 14 #include <zephyr/types.h> 15 16 17 #if defined(CONFIG_SOC_PART_NUMBER_SAME53J18A) 18 #include <same53j18a.h> 19 #elif defined(CONFIG_SOC_PART_NUMBER_SAME53J19A) 20 #include <same53j19a.h> 21 #elif defined(CONFIG_SOC_PART_NUMBER_SAME53J20A) 22 #include <same53j20a.h> 23 #elif defined(CONFIG_SOC_PART_NUMBER_SAME53N19A) 24 #include <same53n19a.h> 25 #elif defined(CONFIG_SOC_PART_NUMBER_SAME53N20A) 26 #include <same53n20a.h> 27 #else 28 #error Library does not support the specified device. 29 #endif 30 31 #endif /* _ASMLANGUAGE */ 32 33 #include "sercom_fixup_samd5x.h" 34 #include "tc_fixup_samd5x.h" 35 #include "gmac_fixup_samd5x.h" 36 #include "adc_fixup_sam0.h" 37 #include "../common/soc_port.h" 38 #include "../common/atmel_sam0_dt.h" 39 40 #define SOC_ATMEL_SAM0_OSC32K_FREQ_HZ 32768 41 42 /** Processor Clock (HCLK) Frequency */ 43 #define SOC_ATMEL_SAM0_HCLK_FREQ_HZ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC 44 /** Master Clock (MCK) Frequency */ 45 #define SOC_ATMEL_SAM0_MCK_FREQ_HZ SOC_ATMEL_SAM0_HCLK_FREQ_HZ 46 #define SOC_ATMEL_SAM0_GCLK0_FREQ_HZ SOC_ATMEL_SAM0_MCK_FREQ_HZ 47 #define SOC_ATMEL_SAM0_GCLK2_FREQ_HZ 48000000 48 49 #endif /* _ATMEL_SAME53_SOC_H_ */ 50
