1 /*
2  * SPDX-License-Identifier: Apache-2.0
3  *
4  * Copyright (c) 2021 ASPEED Technology Inc.
5  */
6 #ifndef ZEPHYR_SOC_ARM_ASPEED_UTIL_H_
7 #define ZEPHYR_SOC_ARM_ASPEED_UTIL_H_
8 #include <zephyr/sys/util.h>
9 #include <zephyr/devicetree.h>
10 #include <zephyr/toolchain.h>
11 
12 /* gcc.h doesn't define __section but checkpatch.pl will complain for this. so
13  * temporarily add a macro here.
14  */
15 #ifndef __section
16 #define __section(x)    __attribute__((__section__(x)))
17 #endif
18 
19 /* to make checkpatch.pl happy */
20 #define ALIGNED16_SECTION(name)         (aligned(16), section(name))
21 #define __section_aligned16(name)       __attribute__(ALIGNED16_SECTION(name))
22 
23 /* non-cached (DMA) memory */
24 #if (CONFIG_SRAM_NC_SIZE > 0)
25 #define NON_CACHED_BSS                  __section(".nocache.bss")
26 #define NON_CACHED_BSS_ALIGN16          __section_aligned16(".nocache.bss")
27 #else
28 #define NON_CACHED_BSS
29 #define NON_CACHED_BSS_ALIGN16          __aligned(16)
30 #endif
31 
32 #define reg_read_poll_timeout(map, reg, val, cond, sleep_ms, timeout_ms)	    \
33 	({									    \
34 		uint32_t __timeout_tick = Z_TIMEOUT_MS(timeout_ms).ticks;	    \
35 		uint32_t __start = sys_clock_tick_get_32();			    \
36 		int __ret = 0;							    \
37 		for (;;) {							    \
38 			val.value = map->reg.value;				    \
39 			if (cond) {						    \
40 				break;						    \
41 			}							    \
42 			if ((sys_clock_tick_get_32() - __start) > __timeout_tick) { \
43 				__ret = -ETIMEDOUT;				    \
44 				break;						    \
45 			}							    \
46 			if (sleep_ms) {						    \
47 				k_msleep(sleep_ms);				    \
48 			}							    \
49 		}								    \
50 		__ret;								    \
51 	})
52 
53 /* Common reset control device name for all ASPEED SOC family */
54 #define ASPEED_RST_CTRL_NAME DT_INST_RESETS_LABEL(0)
55 #define	DEBUG_HALT()	{ volatile int halt = 1; while (halt) { __asm__ volatile("nop"); } }
56 #endif
57