1# General options signifying CPU capabilities of ARM SoCs
2
3# Copyright (c) 2018 Nordic Semiconductor ASA.
4# SPDX-License-Identifier: Apache-2.0
5
6config CPU_HAS_ARM_MPU
7	bool
8	select CPU_HAS_MPU
9	help
10	  This option is enabled when the CPU has a Memory Protection Unit (MPU)
11	  in ARM flavor.
12
13config CPU_HAS_NXP_MPU
14	bool
15	select CPU_HAS_MPU
16	help
17	  This option is enabled when the CPU has a Memory Protection Unit (MPU)
18	  in NXP flavor.
19
20config CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS
21	bool "Custom fixed SoC MPU region definition"
22	help
23	  If enabled, this option signifies that the SoC will
24	  define and configure its own fixed MPU regions in the
25	  SoC definition. These fixed MPU regions are currently
26	  used to set Flash and SRAM default access policies and
27	  they are programmed at boot time.
28
29config CPU_HAS_ARM_SAU
30	bool
31	select CPU_HAS_TEE
32	help
33	  MCU implements the ARM Security Attribution Unit (SAU).
34
35config CPU_HAS_NRF_IDAU
36	bool
37	depends on SOC_SERIES_NRF91X || SOC_NRF5340_CPUAPP
38	select CPU_HAS_TEE
39	help
40	  MCU implements the nRF (vendor-specific) Security Attribution Unit.
41	  (IDAU: "Implementation-Defined Attribution Unit", in accordance with
42	  ARM terminology).
43
44if CPU_HAS_NRF_IDAU
45config NRF_SPU_FLASH_REGION_SIZE
46	hex
47	default 0x8000 if SOC_SERIES_NRF91X
48	default 0x4000 if SOC_NRF5340_CPUAPP
49	help
50	  FLASH region size for the NRF_SPU peripheral
51
52config NRF_SPU_RAM_REGION_SIZE
53	hex
54	default 0x2000 if SOC_SERIES_NRF91X || SOC_NRF5340_CPUAPP
55	help
56	  RAM region size for the NRF_SPU peripheral
57endif
58
59config HAS_SWO
60	bool
61	help
62	  When enabled, indicates that SoC has an SWO output
63
64config SOC_PART_NUMBER
65	string
66	help
67	  This string holds the full part number of the SoC. It is a hidden option
68	  that you should not set directly. The part number selection choice defines
69	  the default value for this string.
70