1 /*
2  * Copyright (c) 2022 Google Inc
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_RESET_STM32L0_RESET_H_
8 #define ZEPHYR_INCLUDE_DT_BINDINGS_RESET_STM32L0_RESET_H_
9 
10 #include "stm32-common.h"
11 
12 /* RCC bus reset register offset */
13 #define STM32_RESET_BUS_IOP  0x1C
14 #define STM32_RESET_BUS_AHB1 0x20
15 #define STM32_RESET_BUS_APB1 0x28
16 #define STM32_RESET_BUS_APB2 0x24
17 
18 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_RESET_STM32L0_RESET_H_ */
19