1 /* 2 * Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32S3_H_ 8 #define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32S3_H_ 9 10 /* System Clock Source */ 11 #define ESP32_CLK_SRC_XTAL 0U 12 #define ESP32_CLK_SRC_PLL 1U 13 #define ESP32_CLK_SRC_RTC8M 2U 14 #define ESP32_CLK_SRC_APLL 3U 15 16 /* Supported CPU Frequencies */ 17 #define ESP32_CLK_CPU_26M 26000000 18 #define ESP32_CLK_CPU_40M 40000000 19 #define ESP32_CLK_CPU_80M 80000000 20 #define ESP32_CLK_CPU_160M 160000000 21 #define ESP32_CLK_CPU_240M 240000000 22 23 /* Supported XTAL Frequencies */ 24 #define ESP32_CLK_XTAL_24M 0U 25 #define ESP32_CLK_XTAL_26M 1U 26 #define ESP32_CLK_XTAL_40M 2U 27 #define ESP32_CLK_XTAL_AUTO 3U 28 29 /* Supported RTC fast clock frequencies */ 30 #define ESP32_RTC_FAST_CLK_FREQ_8M 8500000U 31 32 /* Supported RTC slow clock frequencies */ 33 #define ESP32_RTC_SLOW_CLK_FREQ_150K 150000U 34 #define ESP32_RTC_SLOW_CLK_FREQ_32K 32000U 35 #define ESP32_RTC_SLOW_CLK_FREQ_8MD256 (ESP32_RTC_FAST_CLK_FREQ_8M / 256) 36 37 /* Modules IDs 38 * These IDs are actually offsets in CLK and RST Control registers. 39 * These IDs shouldn't be changed unless there is a Hardware change 40 * from Espressif. 41 * 42 * Basic Modules 43 * Registers: DPORT_PERIP_CLK_EN_REG, DPORT_PERIP_RST_EN_REG 44 */ 45 #define ESP32_LEDC_MODULE 0 46 #define ESP32_UART0_MODULE 1 47 #define ESP32_UART1_MODULE 2 48 #define ESP32_UART2_MODULE 3 49 #define ESP32_USB_MODULE 4 50 #define ESP32_I2C0_MODULE 5 51 #define ESP32_I2C1_MODULE 6 52 #define ESP32_I2S0_MODULE 7 53 #define ESP32_I2S1_MODULE 8 54 #define ESP32_LCD_CAM_MODULE 9 55 #define ESP32_TIMG0_MODULE 10 56 #define ESP32_TIMG1_MODULE 11 57 #define ESP32_PWM0_MODULE 12 58 #define ESP32_PWM1_MODULE 13 59 #define ESP32_PWM2_MODULE 14 60 #define ESP32_PWM3_MODULE 15 61 #define ESP32_UHCI0_MODULE 16 62 #define ESP32_UHCI1_MODULE 17 63 #define ESP32_RMT_MODULE 18 64 #define ESP32_PCNT_MODULE 19 65 #define ESP32_SPI_MODULE 20 66 #define ESP32_SPI2_MODULE 21 67 #define ESP32_SPI3_MODULE 22 68 #define ESP32_SDMMC_MODULE 23 69 #define ESP32_TWAI_MODULE 24 70 #define ESP32_RNG_MODULE 25 71 #define ESP32_WIFI_MODULE 26 72 #define ESP32_BT_MODULE 27 73 #define ESP32_WIFI_BT_COMMON_MODULE 28 74 #define ESP32_BT_BASEBAND_MODULE 29 75 #define ESP32_BT_LC_MODULE 30 76 #define ESP32_AES_MODULE 31 77 #define ESP32_SHA_MODULE 32 78 #define ESP32_HMAC_MODULE 33 79 #define ESP32_DS_MODULE 34 80 #define ESP32_RSA_MODULE 35 81 #define ESP32_SYSTIMER_MODULE 36 82 #define ESP32_GDMA_MODULE 37 83 #define ESP32_DEDIC_GPIO_MODULE 38 84 #define ESP32_SARADC_MODULE 39 85 #define ESP32_MODULE_MAX 40 86 87 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32S3_H_ */ 88
