1 /* 2 * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32S2_H_ 8 #define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32S2_H_ 9 10 /* System Clock Source */ 11 #define ESP32_CLK_SRC_XTAL 0U 12 #define ESP32_CLK_SRC_PLL 1U 13 #define ESP32_CLK_SRC_RTC8M 2U 14 #define ESP32_CLK_SRC_APLL 3U 15 16 /* Supported CPU Frequencies */ 17 #define ESP32_CLK_CPU_26M 26000000 18 #define ESP32_CLK_CPU_40M 40000000 19 #define ESP32_CLK_CPU_80M 80000000 20 #define ESP32_CLK_CPU_160M 160000000 21 #define ESP32_CLK_CPU_240M 240000000 22 23 /* Supported XTAL Frequencies */ 24 #define ESP32_CLK_XTAL_40M 0U 25 26 /* Supported RTC fast clock frequencies */ 27 #define ESP32_RTC_FAST_CLK_FREQ_8M 8500000U 28 #define ESP32_RTC_FAST_CLK_FREQ_APPROX ESP32_RTC_FAST_CLK_FREQ_8M 29 30 /* Supported RTC slow clock frequencies */ 31 #define ESP32_RTC_SLOW_CLK_FREQ_90K 90000U 32 #define ESP32_RTC_SLOW_CLK_FREQ_8MD256 (ESP32_RTC_FAST_CLK_FREQ_APPROX / 256) 33 #define ESP32_RTC_SLOW_CLK_FREQ_32K 32768U 34 35 /* Modules IDs 36 * These IDs are actually offsets in CLK and RST Control registers. 37 * These IDs shouldn't be changed unless there is a Hardware change 38 * from Espressif. 39 * 40 * Basic Modules 41 * Registers: DPORT_PERIP_CLK_EN_REG, DPORT_PERIP_RST_EN_REG 42 */ 43 #define ESP32_LEDC_MODULE 0 44 #define ESP32_UART0_MODULE 1 45 #define ESP32_UART1_MODULE 2 46 #define ESP32_USB_MODULE 3 47 #define ESP32_I2C0_MODULE 4 48 #define ESP32_I2C1_MODULE 5 49 #define ESP32_I2S0_MODULE 6 50 #define ESP32_TIMG0_MODULE 7 51 #define ESP32_TIMG1_MODULE 8 52 #define ESP32_UHCI0_MODULE 9 53 #define ESP32_UHCI1_MODULE 10 54 #define ESP32_RMT_MODULE 11 55 #define ESP32_PCNT_MODULE 12 56 #define ESP32_SPI_MODULE 13 57 #define ESP32_FSPI_MODULE 14 58 #define ESP32_HSPI_MODULE 15 59 #define ESP32_SPI2_DMA_MODULE 16 60 #define ESP32_SPI3_DMA_MODULE 17 61 #define ESP32_TWAI_MODULE 18 62 #define ESP32_RNG_MODULE 19 63 #define ESP32_WIFI_MODULE 20 64 #define ESP32_WIFI_BT_COMMON_MODULE 21 65 #define ESP32_SYSTIMER_MODULE 22 66 #define ESP32_AES_MODULE 23 67 #define ESP32_SHA_MODULE 24 68 #define ESP32_RSA_MODULE 25 69 #define ESP32_CRYPTO_DMA_MODULE 26 70 #define ESP32_AES_DMA_MODULE 27 71 #define ESP32_SHA_DMA_MODULE 28 72 #define ESP32_DEDIC_GPIO_MODULE 29 73 #define ESP32_PERIPH_SARADC_MODULE 30 74 #define ESP32_MODULE_MAX 31 75 76 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32S2_H_ */ 77
