1/*
2 * Copyright (c) 2020 Cobham Gaisler AB
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include "skeleton.dtsi"
8
9/ {
10	cpus {
11		#address-cells = <1>;
12		#size-cells = <0>;
13
14		cpu0: cpu@0 {
15			compatible = "gaisler,leon3";
16			reg = <0>;
17		};
18	};
19
20	dram: ram@30000000 {
21		/* tightly coupled data RAM */
22		reg = <0x30000000 0x00010000>;
23	};
24
25	iram: ram@31000000 {
26		/* tightly coupled instruction RAM */
27		reg = <0x31000000 0x00020000>;
28	};
29
30	soc {
31		#address-cells = <1>;
32		#size-cells = <1>;
33		compatible = "gaisler,gr716-soc", "simple-bus";
34		ranges;
35		interrupt-parent = <&irqmp>;
36
37		irqmp: irqmp0@80002000 {
38			compatible = "gaisler,irqmp";
39			reg = <0x80002000 0x400>;
40			eirq = <1>;
41			interrupt-controller;
42			#interrupt-cells = <1>;
43		};
44
45		timer0: gptimer@80003000 {
46			compatible = "gaisler,gptimer";
47			interrupts = <9>;
48			reg = <0x80003000 0x100>;
49		};
50
51		uart0: apbuart@80300000 {
52			compatible = "gaisler,apbuart";
53			interrupts = <24>;
54			reg = <0x80300000 0x100>;
55			status = "disabled";
56		};
57
58		uart1: apbuart@80301000 {
59			compatible = "gaisler,apbuart";
60			interrupts = <25>;
61			reg = <0x80301000 0x100>;
62			status = "disabled";
63		};
64
65		uart2: apbuart@80302000 {
66			compatible = "gaisler,apbuart";
67			interrupts = <3>;
68			reg = <0x80302000 0x100>;
69			status = "disabled";
70		};
71
72		uart3: apbuart@80303000 {
73			compatible = "gaisler,apbuart";
74			interrupts = <5>;
75			reg = <0x80303000 0x100>;
76			status = "disabled";
77		};
78
79		uart4: apbuart@80304000 {
80			compatible = "gaisler,apbuart";
81			interrupts = <6>;
82			reg = <0x80304000 0x100>;
83			status = "disabled";
84		};
85
86		uart5: apbuart@80305000 {
87			compatible = "gaisler,apbuart";
88			interrupts = <7>;
89			reg = <0x80305000 0x100>;
90			status = "disabled";
91		};
92	};
93};
94