1/* 2 * Copyright (c) 2023 ITE Corporation. All Rights Reserved. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <ite/it8xxx2.dtsi> 8 9/ { 10 soc { 11 gpiogcr: gpio-gcr@f01600 { 12 compatible = "ite,it8xxx2-gpiogcr"; 13 reg = <0x00f01600 0x100>; 14 }; 15 16 gpioksi: gpiokscan@f01d07 { 17 compatible = "ite,it8xxx2-gpiokscan"; 18 reg = <0x00f01d07 1 19 0x00f01d06 1 20 0x00f01d08 1 21 0x00f01d09 1 22 0x00f01d26 1>; 23 reg-names = "goen", "gctrl", "gdat", "gdmr", "gpod"; 24 ngpios = <8>; 25 gpio-controller; 26 #gpio-cells = <2>; 27 }; 28 29 gpioksoh: gpiokscan@f01d0b { 30 compatible = "ite,it8xxx2-gpiokscan"; 31 reg = <0x00f01d0b 1 32 0x00f01d0a 1 33 0x00f01d01 1 34 0x00f01d0c 1 35 0x00f01d27 1>; 36 reg-names = "goen", "gctrl", "gdat", "gdmr", "gpod"; 37 ngpios = <8>; 38 gpio-controller; 39 #gpio-cells = <2>; 40 }; 41 42 gpioksol: gpiokscan@f01d0e { 43 compatible = "ite,it8xxx2-gpiokscan"; 44 reg = <0x00f01d0e 1 45 0x00f01d0d 1 46 0x00f01d00 1 47 0x00f01d0f 1 48 0x00f01d28 1>; 49 reg-names = "goen", "gctrl", "gdat", "gdmr", "gpod"; 50 ngpios = <8>; 51 gpio-controller; 52 #gpio-cells = <2>; 53 }; 54 55 pinctrl: pin-controller { 56 compatible = "ite,it8xxx2-pinctrl"; 57 #address-cells = <1>; 58 #size-cells = <1>; 59 status = "okay"; 60 61 pinctrla: pinctrl@f01610 { 62 compatible = "ite,it8xxx2-pinctrl-func"; 63 reg = <0x00f01610 8>; /* GPCR */ 64 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 65 0xf02032 0xf02032 0xf016f0 0xf016f0>; 66 func3-en-mask = <0 0 0 0 67 0x02 0x02 0x10 0x0C >; 68 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 69 NO_FUNC NO_FUNC NO_FUNC NO_FUNC >; 70 func4-en-mask = <0 0 0 0 71 0 0 0 0 >; 72 volt-sel = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 73 0xf016e9 0xf016e9 0xf016e9 0xf016e9>; 74 volt-sel-mask = <0 0 0 0 75 0x1 0x02 0x20 0x40 >; 76 #pinmux-cells = <2>; 77 gpio-group; 78 }; 79 80 pinctrlb: pinctrl@f01618 { 81 compatible = "ite,it8xxx2-pinctrl-func"; 82 reg = <0x00f01618 8>; /* GPCR */ 83 func3-gcr = <0xf016f5 0xf016f5 NO_FUNC NO_FUNC 84 NO_FUNC NO_FUNC NO_FUNC 0xf01600>; 85 func3-en-mask = <0x01 0x02 0 0 86 0 0 0 0x02 >; 87 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 88 NO_FUNC NO_FUNC NO_FUNC 0xf016f1>; 89 func4-en-mask = <0 0 0 0 90 0 0 0 0x40 >; 91 volt-sel = <NO_FUNC NO_FUNC NO_FUNC 0xf016e7 92 0xf016e7 0xf016e4 0xf016e4 0xf016e9>; 93 volt-sel-mask = <0 0 0 0x02 94 0x01 0x80 0x40 0x10 >; 95 #pinmux-cells = <2>; 96 gpio-group; 97 }; 98 99 pinctrlc: pinctrl@f01620 { 100 compatible = "ite,it8xxx2-pinctrl-func"; 101 reg = <0x00f01620 8>; /* GPCR */ 102 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC 0xf016f0 103 NO_FUNC 0xf016f0 NO_FUNC 0xf016f3>; 104 func3-en-mask = <0 0 0 0x10 105 0 0x10 0 0x02 >; 106 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 107 NO_FUNC NO_FUNC NO_FUNC 0xf016f6>; 108 func4-en-mask = <0 0 0 0 109 0 0 0 0x80 >; 110 volt-sel = <0xf016e7 0xf016e4 0xf016e4 NO_FUNC 111 0xf016e9 NO_FUNC 0xf016e9 0xf016e4>; 112 volt-sel-mask = <0x80 0x20 0x10 0 113 0x04 0 0x08 0x08 >; 114 #pinmux-cells = <2>; 115 gpio-group; 116 }; 117 118 pinctrld: pinctrl@f01628 { 119 compatible = "ite,it8xxx2-pinctrl-func"; 120 reg = <0x00f01628 8>; /* GPCR */ 121 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 122 NO_FUNC 0xf016f0 NO_FUNC NO_FUNC>; 123 func3-en-mask = <0 0 0 0 124 0 0x02 0 0 >; 125 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 126 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 127 func4-en-mask = <0 0 0 0 128 0 0 0 0 >; 129 volt-sel = <0xf016e4 0xf016e4 0xf016e4 0xf016e5 130 0xf016e5 0xf016e7 0xf016e7 0xf016e7>; 131 volt-sel-mask = <0x04 0x02 0x01 0x80 132 0x40 0x10 0x20 0x40 >; 133 #pinmux-cells = <2>; 134 gpio-group; 135 }; 136 137 pinctrle: pinctrl@f01630 { 138 compatible = "ite,it8xxx2-pinctrl-func"; 139 reg = <0x00f01630 8>; /* GPCR */ 140 func3-gcr = <0xf02032 NO_FUNC NO_FUNC NO_FUNC 141 NO_FUNC 0xf016f0 NO_FUNC 0xf02032>; 142 func3-en-mask = <0x01 0 0 0 143 0 0x08 0 0x01 >; 144 func4-gcr = <0xf016f3 NO_FUNC NO_FUNC NO_FUNC 145 NO_FUNC NO_FUNC NO_FUNC NO_FUNC >; 146 func4-en-mask = <0x01 0 0 0 147 0 0 0 0 >; 148 volt-sel = <0xf016e5 0xf016d4 0xf016d4 NO_FUNC 149 0xf016e7 0xf016e7 0xf016e5 0xf016e5>; 150 volt-sel-mask = <0x20 0x40 0x80 0 151 0x04 0x08 0x10 0x08 >; 152 #pinmux-cells = <2>; 153 gpio-group; 154 }; 155 156 pinctrlf: pinctrl@f01638 { 157 compatible = "ite,it8xxx2-pinctrl-func"; 158 reg = <0x00f01638 8>; /* GPCR */ 159 func3-gcr = <NO_FUNC NO_FUNC 0xf016f0 0xf016f0 160 NO_FUNC NO_FUNC 0xf016f1 0xf016f1>; 161 func3-en-mask = <0 0 0x02 0x02 162 0 0 0x10 0x10 >; 163 func4-gcr = <NO_FUNC NO_FUNC 0xf02046 0xf02046 164 NO_FUNC NO_FUNC NO_FUNC NO_FUNC >; 165 func4-en-mask = <0 0 0x40 0x40 166 0 0 0 0 >; 167 volt-sel = <0xf016d4 0xf016d4 0xf016e5 0xf016e5 168 0xf016e5 0xf016e6 0xf016e6 0xf016e6>; 169 volt-sel-mask = <0x10 0x20 0x04 0x02 170 0x01 0x80 0x40 0x20 >; 171 #pinmux-cells = <2>; 172 gpio-group; 173 }; 174 175 pinctrlg: pinctrl@f01640 { 176 compatible = "ite,it8xxx2-pinctrl-func"; 177 reg = <0x00f01640 8>; /* GPCR */ 178 func3-gcr = <0xf016f0 0xf016f0 0xf016f0 NO_FUNC 179 NO_FUNC NO_FUNC 0xf016f0 NO_FUNC>; 180 func3-en-mask = <0x20 0x08 0x10 0 181 0 0 0x02 0 >; 182 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 183 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 184 func4-en-mask = <0 0 0 0 185 0 0 0 0 >; 186 volt-sel = <0xf016d4 0xf016e6 0xf016d4 NO_FUNC 187 NO_FUNC NO_FUNC 0xf016e6 NO_FUNC>; 188 volt-sel-mask = <0x04 0x10 0x08 0 189 0 0 0x08 0 >; 190 #pinmux-cells = <2>; 191 gpio-group; 192 }; 193 194 pinctrlh: pinctrl@f01648 { 195 compatible = "ite,it8xxx2-pinctrl-func"; 196 reg = <0x00f01648 8>; /* GPCR */ 197 func3-gcr = <NO_FUNC 0xf016f1 0xf016f1 NO_FUNC 198 NO_FUNC 0xf016f5 0xf016f5 NO_FUNC>; 199 func3-en-mask = <0 0x20 0x20 0 200 0 0x04 0x08 0 >; 201 func3-ext = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 202 NO_FUNC 0xf03a23 0xf03a23 NO_FUNC>; 203 func3-ext-mask = <0 0 0 0 204 0 0x01 0x01 0 >; 205 func4-gcr = <NO_FUNC 0xf016f5 0xf016f5 NO_FUNC 206 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 207 func4-en-mask = <0 0x04 0x08 0 208 0 0 0 0 >; 209 volt-sel = <0xf016e6 0xf016e6 0xf016e6 NO_FUNC 210 NO_FUNC 0xf016d3 0xf016d4 NO_FUNC>; 211 volt-sel-mask = <0x04 0x02 0x01 0 212 0 0x80 0x01 0 >; 213 #pinmux-cells = <2>; 214 gpio-group; 215 }; 216 217 pinctrli: pinctrl@f01650 { 218 compatible = "ite,it8xxx2-pinctrl-func"; 219 reg = <0x00f01650 8>; /* GPCR */ 220 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 221 NO_FUNC 0xf016f0 0xf016f0 0xf016f0>; 222 func3-en-mask = <0 0 0 0 223 0 0x08 0x08 0x08 >; 224 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 225 NO_FUNC NO_FUNC NO_FUNC NO_FUNC >; 226 func4-en-mask = <0 0 0 0 227 0 0 0 0 >; 228 volt-sel = <0xf016d3 0xf016e8 0xf016e8 0xf016e8 229 0xf016e8 0xf016d3 0xf016d3 0xf016d3>; 230 volt-sel-mask = <0x08 0x10 0x20 0x40 231 0x80 0x10 0x20 0x40 >; 232 #pinmux-cells = <2>; 233 gpio-group; 234 }; 235 236 pinctrlj: pinctrl@f01658 { 237 compatible = "ite,it8xxx2-pinctrl-func"; 238 reg = <0x00f01658 8>; /* GPCR */ 239 func3-gcr = <0xf016f4 NO_FUNC 0xf016f4 0xf016f4 240 0xf016f0 0xf016f0 NO_FUNC NO_FUNC>; 241 func3-en-mask = <0x01 0 0x01 0x02 242 0x02 0x03 0 0 >; 243 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 244 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 245 func4-en-mask = <0 0 0 0 246 0 0 0 0 >; 247 volt-sel = <0xf016e8 0xf016e8 0xf016e8 0xf016e8 248 0xf016d3 0xf016d3 0xf016d3 0xf016d7>; 249 volt-sel-mask = <0x01 0x02 0x04 0x08 250 0x01 0x02 0x04 0x04 >; 251 #pinmux-cells = <2>; 252 gpio-group; 253 }; 254 255 pinctrlk: pinctrl@f01690 { 256 compatible = "ite,it8xxx2-pinctrl-func"; 257 reg = <0x00f01690 8>; /* GPCR */ 258 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 259 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 260 func3-en-mask = <0 0 0 0 261 0 0 0 0 >; 262 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 263 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 264 func4-en-mask = <0 0 0 0 265 0 0 0 0 >; 266 volt-sel = <0xf016d2 0xf016d2 0xf016d2 0xf016d2 267 0xf016d2 0xf016d2 0xf016d2 0xf016d2>; 268 volt-sel-mask = <0x01 0x02 0x04 0x08 269 0x10 0x20 0x40 0x80 >; 270 #pinmux-cells = <2>; 271 gpio-group; 272 }; 273 274 pinctrll: pinctrl@f01698 { 275 compatible = "ite,it8xxx2-pinctrl-func"; 276 reg = <0x00f01698 8>; /* GPCR */ 277 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 278 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 279 func3-en-mask = <0 0 0 0 280 0 0 0 0 >; 281 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 282 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 283 func4-en-mask = <0 0 0 0 284 0 0 0 0 >; 285 volt-sel = <0xf016d1 0xf016d1 0xf016d1 0xf016d1 286 0xf016d1 0xf016d1 0xf016d1 0xf016d1>; 287 volt-sel-mask = <0x01 0x02 0x04 0x08 288 0x10 0x20 0x40 0x80 >; 289 #pinmux-cells = <2>; 290 gpio-group; 291 }; 292 293 pinctrlm: pinctrl@f016a0 { 294 compatible = "ite,it8xxx2-pinctrl-func"; 295 reg = <0x00f016a0 8>; /* GPCR */ 296 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 297 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 298 func3-en-mask = <0 0 0 0 299 0 0 0 0 >; 300 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 301 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 302 func4-en-mask = <0 0 0 0 303 0 0 0 0 >; 304 volt-sel = <0xf016ed 0xf016ed 0xf016ed 0xf016ed 305 0xf016ed 0xf016ed 0xf016ed NO_FUNC >; 306 volt-sel-mask = <0x10 0x10 0x10 0x10 307 0x10 0x10 0x10 0 >; 308 #pinmux-cells = <2>; 309 gpio-group; 310 }; 311 312 pinctrlksi: pinctrl@f01d06 { 313 compatible = "ite,it8xxx2-pinctrl-func"; 314 reg = <0x00f01d06 1 /* KSIGCTRL */ 315 0x00f01d05 1>; /* KSICTRL */ 316 pp-od-mask = <NO_FUNC>; 317 pullup-mask = <BIT(2)>; 318 #pinmux-cells = <2>; 319 }; 320 321 pinctrlksoh: pinctrl@f01d0a { 322 compatible = "ite,it8xxx2-pinctrl-func"; 323 reg = <0x00f01d0a 1 /* KSOHGCTRL */ 324 0x00f01d02 1>; /* KSOCTRL */ 325 pp-od-mask = <BIT(0)>; 326 pullup-mask = <BIT(2)>; 327 #pinmux-cells = <2>; 328 }; 329 330 pinctrlksol: pinctrl@f01d0d { 331 compatible = "ite,it8xxx2-pinctrl-func"; 332 reg = <0x00f01d0d 1 /* KSOLGCTRL */ 333 0x00f01d02 1>; /* KSOCTRL */ 334 pp-od-mask = <BIT(0)>; 335 pullup-mask = <BIT(2)>; 336 #pinmux-cells = <2>; 337 }; 338 }; 339 340 i2c0: i2c@f01c40 { 341 compatible = "ite,it8xxx2-i2c"; 342 #address-cells = <1>; 343 #size-cells = <0>; 344 reg = <0x00f01c40 0x0040 /* Base address */ 345 0x00f01c0d 0x0001>; /* MSTFCTRL1 */ 346 interrupts = <IT8XXX2_IRQ_SMB_A IRQ_TYPE_LEVEL_HIGH>; 347 interrupt-parent = <&intc>; 348 status = "disabled"; 349 port-num = <SMB_CHANNEL_A>; 350 scl-gpios = <&gpiob 3 0>; 351 sda-gpios = <&gpiob 4 0>; 352 clock-gate-offset = <CGC_OFFSET_SMBA>; 353 fifo-enable; /* FIFO1 */ 354 }; 355 356 i2c1: i2c@f01c80 { 357 compatible = "ite,it8xxx2-i2c"; 358 #address-cells = <1>; 359 #size-cells = <0>; 360 reg = <0x00f01c80 0x0040 /* Base address */ 361 0x00f01c0f 0x0001>; /* MSTFCTRL2 */ 362 interrupts = <IT8XXX2_IRQ_SMB_B IRQ_TYPE_LEVEL_HIGH>; 363 interrupt-parent = <&intc>; 364 status = "disabled"; 365 port-num = <SMB_CHANNEL_B>; 366 scl-gpios = <&gpioc 1 0>; 367 sda-gpios = <&gpioc 2 0>; 368 clock-gate-offset = <CGC_OFFSET_SMBB>; 369 fifo-enable; /* FIFO2 */ 370 }; 371 372 i2c2: i2c@f01cc0 { 373 compatible = "ite,it8xxx2-i2c"; 374 #address-cells = <1>; 375 #size-cells = <0>; 376 reg = <0x00f01cc0 0x0040 /* Base address */ 377 0x00f01c0f 0x0001>; /* MSTFCTRL2 */ 378 interrupts = <IT8XXX2_IRQ_SMB_C IRQ_TYPE_LEVEL_HIGH>; 379 interrupt-parent = <&intc>; 380 status = "disabled"; 381 port-num = <SMB_CHANNEL_C>; 382 scl-gpios = <&gpiof 6 0>; 383 sda-gpios = <&gpiof 7 0>; 384 clock-gate-offset = <CGC_OFFSET_SMBC>; 385 /delete-property/ fifo-enable; /* FIFO2 */ 386 }; 387 388 i2c3: i2c@f03680 { 389 compatible = "ite,enhance-i2c"; 390 #address-cells = <1>; 391 #size-cells = <0>; 392 reg = <0x00f03680 0x0080>; 393 interrupts = <IT8XXX2_IRQ_SMB_D IRQ_TYPE_LEVEL_HIGH>; 394 interrupt-parent = <&intc>; 395 status = "disabled"; 396 port-num = <I2C_CHANNEL_D>; 397 scl-gpios = <&gpioh 1 0>; 398 sda-gpios = <&gpioh 2 0>; 399 clock-gate-offset = <CGC_OFFSET_SMBD>; 400 }; 401 402 i2c4: i2c@f03500 { 403 compatible = "ite,enhance-i2c"; 404 #address-cells = <1>; 405 #size-cells = <0>; 406 reg = <0x00f03500 0x0080>; 407 interrupts = <IT8XXX2_IRQ_SMB_E IRQ_TYPE_LEVEL_HIGH>; 408 interrupt-parent = <&intc>; 409 status = "disabled"; 410 port-num = <I2C_CHANNEL_E>; 411 scl-gpios = <&gpioe 0 0>; 412 sda-gpios = <&gpioe 7 0>; 413 clock-gate-offset = <CGC_OFFSET_SMBE>; 414 }; 415 416 i2c5: i2c@f03580 { 417 compatible = "ite,enhance-i2c"; 418 #address-cells = <1>; 419 #size-cells = <0>; 420 reg = <0x00f03580 0x0080>; 421 interrupts = <IT8XXX2_IRQ_SMB_F IRQ_TYPE_LEVEL_HIGH>; 422 interrupt-parent = <&intc>; 423 status = "disabled"; 424 port-num = <I2C_CHANNEL_F>; 425 scl-gpios = <&gpioa 4 0>; 426 sda-gpios = <&gpioa 5 0>; 427 clock-gate-offset = <CGC_OFFSET_SMBF>; 428 }; 429 430 wuc1: wakeup-controller@f01b00 { 431 compatible = "ite,it8xxx2-wuc"; 432 reg = <0x00f01b00 1 /* WUEMR1 */ 433 0x00f01b04 1 /* WUESR1 */ 434 0x00f01b08 1 /* WUENR1 */ 435 0x00f01b3c 1>; /* WUBEMR1 */ 436 wakeup-controller; 437 #wuc-cells = <1>; 438 }; 439 440 wuc2: wakeup-controller@f01b01 { 441 compatible = "ite,it8xxx2-wuc"; 442 reg = <0x00f01b01 1 /* WUEMR2 */ 443 0x00f01b05 1 /* WUESR2 */ 444 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR2 */ 445 0x00f01b3d 1>; /* WUBEMR2 */ 446 wakeup-controller; 447 #wuc-cells = <1>; 448 }; 449 450 wuc3: wakeup-controller@f01b02 { 451 compatible = "ite,it8xxx2-wuc"; 452 reg = <0x00f01b02 1 /* WUEMR3 */ 453 0x00f01b06 1 /* WUESR3 */ 454 0x00f01b0a 1 /* WUENR3 */ 455 0x00f01b3e 1>; /* WUBEMR3 */ 456 wakeup-controller; 457 #wuc-cells = <1>; 458 }; 459 460 wuc4: wakeup-controller@f01b03 { 461 compatible = "ite,it8xxx2-wuc"; 462 reg = <0x00f01b03 1 /* WUEMR4 */ 463 0x00f01b07 1 /* WUESR4 */ 464 0x00f01b0b 1 /* WUENR4 */ 465 0x00f01b3f 1>; /* WUBEMR4 */ 466 wakeup-controller; 467 #wuc-cells = <1>; 468 }; 469 470 wuc5: wakeup-controller@f01b0c { 471 compatible = "ite,it8xxx2-wuc"; 472 reg = <0x00f01b0c 1 /* WUEMR5 */ 473 0x00f01b0d 1 /* WUESR5 */ 474 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR5 */ 475 0x00f01b0f 1>; /* WUBEMR5 */ 476 wakeup-controller; 477 #wuc-cells = <1>; 478 }; 479 480 wuc6: wakeup-controller@f01b10 { 481 compatible = "ite,it8xxx2-wuc"; 482 reg = <0x00f01b10 1 /* WUEMR6 */ 483 0x00f01b11 1 /* WUESR6 */ 484 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR6 */ 485 0x00f01b13 1>; /* WUBEMR6 */ 486 wakeup-controller; 487 #wuc-cells = <1>; 488 }; 489 490 wuc7: wakeup-controller@f01b14 { 491 compatible = "ite,it8xxx2-wuc"; 492 reg = <0x00f01b14 1 /* WUEMR7 */ 493 0x00f01b15 1 /* WUESR7 */ 494 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR7 */ 495 0x00f01b17 1>; /* WUBEMR7 */ 496 wakeup-controller; 497 #wuc-cells = <1>; 498 }; 499 500 wuc8: wakeup-controller@f01b18 { 501 compatible = "ite,it8xxx2-wuc"; 502 reg = <0x00f01b18 1 /* WUEMR8 */ 503 0x00f01b19 1 /* WUESR8 */ 504 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR8 */ 505 0x00f01b1b 1>; /* WUBEMR8 */ 506 wakeup-controller; 507 #wuc-cells = <1>; 508 }; 509 510 wuc9: wakeup-controller@f01b1c { 511 compatible = "ite,it8xxx2-wuc"; 512 reg = <0x00f01b1c 1 /* WUEMR9 */ 513 0x00f01b1d 1 /* WUESR9 */ 514 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR9 */ 515 0x00f01b1f 1>; /* WUBEMR9 */ 516 wakeup-controller; 517 #wuc-cells = <1>; 518 }; 519 520 wuc10: wakeup-controller@f01b20 { 521 compatible = "ite,it8xxx2-wuc"; 522 reg = <0x00f01b20 1 /* WUEMR10 */ 523 0x00f01b21 1 /* WUESR10 */ 524 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR10 */ 525 0x00f01b23 1>; /* WUBEMR10 */ 526 wakeup-controller; 527 #wuc-cells = <1>; 528 }; 529 530 wuc11: wakeup-controller@f01b24 { 531 compatible = "ite,it8xxx2-wuc"; 532 reg = <0x00f01b24 1 /* WUEMR11 */ 533 0x00f01b25 1 /* WUESR11 */ 534 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR11 */ 535 0x00f01b27 1>; /* WUBEMR11 */ 536 wakeup-controller; 537 #wuc-cells = <1>; 538 }; 539 540 wuc12: wakeup-controller@f01b28 { 541 compatible = "ite,it8xxx2-wuc"; 542 reg = <0x00f01b28 1 /* WUEMR12 */ 543 0x00f01b29 1 /* WUESR12 */ 544 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR12 */ 545 0x00f01b2b 1>; /* WUBEMR12 */ 546 wakeup-controller; 547 #wuc-cells = <1>; 548 }; 549 550 wuc13: wakeup-controller@f01b2c { 551 compatible = "ite,it8xxx2-wuc"; 552 reg = <0x00f01b2c 1 /* WUEMR13 */ 553 0x00f01b2d 1 /* WUESR13 */ 554 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR13 */ 555 0x00f01b2f 1>; /* WUBEMR13 */ 556 wakeup-controller; 557 #wuc-cells = <1>; 558 }; 559 560 wuc14: wakeup-controller@f01b30 { 561 compatible = "ite,it8xxx2-wuc"; 562 reg = <0x00f01b30 1 /* WUEMR14 */ 563 0x00f01b31 1 /* WUESR14 */ 564 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR14 */ 565 0x00f01b33 1>; /* WUBEMR14 */ 566 wakeup-controller; 567 #wuc-cells = <1>; 568 }; 569 570 wuc15: wakeup-controller@f01b34 { 571 compatible = "ite,it8xxx2-wuc"; 572 reg = <0x00f01b34 1 /* WUEMR15 */ 573 0x00f01b35 1 /* WUESR15 */ 574 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR15 */ 575 0x00f01b37 1>; /* WUBEMR15 */ 576 wakeup-controller; 577 #wuc-cells = <1>; 578 }; 579 580 wuc16: wakeup-controller@f01b38 { 581 compatible = "ite,it8xxx2-wuc"; 582 reg = <0x00f01b38 1 /* WUEMR16 */ 583 0x00f01b39 1 /* WUESR16 */ 584 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR16 */ 585 0x00f01b3b 1>; /* WUBEMR16 */ 586 wakeup-controller; 587 #wuc-cells = <1>; 588 }; 589 590 intc: interrupt-controller@f03f00 { 591 compatible = "ite,it8xxx2-intc"; 592 #address-cells = <0>; 593 #interrupt-cells = <2>; 594 interrupt-controller; 595 reg = <0x00f03f00 0x0100>; 596 }; 597 598 twd0: watchdog@f01f00 { 599 compatible = "ite,it8xxx2-watchdog"; 600 reg = <0x00f01f00 0x000f>; 601 interrupts = <IT8XXX2_IRQ_TIMER1 IRQ_TYPE_EDGE_RISING /* Warning timer */ 602 IT8XXX2_IRQ_TIMER2 IRQ_TYPE_EDGE_RISING>; /* One shot timer */ 603 interrupt-parent = <&intc>; 604 }; 605 }; 606}; 607 608
