1#
2# Copyright 2023, NXP
3#
4# SPDX-License-Identifier: Apache-2.0
5#
6description: NXP MCUX MIPI DSI 2L
7
8compatible: "nxp,mipi-dsi-2l"
9
10include: mipi-dsi-host.yaml
11
12properties:
13  interrupts:
14    required: true
15
16  nxp,lcdif:
17    type: phandle
18    description:
19      Instance of the LCDIF peripheral. Only required when using the MIPI
20      in video mode
21  dpi-color-coding:
22    type: string
23    enum:
24      - "16-bit-config-1"
25      - "16-bit-config-2"
26      - "16-bit-config-3"
27      - "18-bit-config-1"
28      - "18-bit-config-2"
29      - "24-bit"
30    description:
31      MIPI DPI interface color coding. Sets the distribution of RGB bits within
32      the 24-bit d bus, as specified by the DPI specification.
33
34  dpi-pixel-packet:
35    type: string
36    enum:
37      - "16-bit"
38      - "18-bit"
39      - "18-bit-loose"
40      - "24-bit"
41    description:
42      MIPI DSI pixel packet type send through DPI interface.
43
44  dpi-video-mode:
45    type: string
46    enum:
47      - "non-burst-sync-pulse"
48      - "non-burst-sync-event"
49      - "burst"
50    description:
51      DPI video mode.
52
53  dpi-bllp-mode:
54    type: string
55    enum:
56      - "low-power"
57      - "blank"
58      - "null"
59    description:
60      Behavior in BLLP (Blanking or Low-Power Interval).
61
62  autoinsert-eotp:
63    type: boolean
64    description:
65      Automatically insert an EoTp short packet when switching from HS to LP mode.
66
67  dphy-ref-frequency:
68    type: int
69    default: 0
70    description:
71      Maximum clock speed supported by the device, in Hz. Leave at default
72      if no DPHY PLL is present
73