1# Copyright (c) 2020, Kim Bøndergaard <kim@fam-boendergaard.dk>
2# SPDX-License-Identifier: Apache-2.0
3
4description: ST7735R/ST7735S 160x128 (max) display controller
5
6compatible: "sitronix,st7735r"
7
8include: [spi-device.yaml, display-controller.yaml]
9
10properties:
11  reset-gpios:
12    type: phandle-array
13    description: RESET pin.
14
15      The RESET pin of ST7735R is active low.
16      If connected directly the MCU pin should be configured
17      as active low.
18
19  cmd-data-gpios:
20    type: phandle-array
21    required: true
22    description: D/CX pin.
23
24      The D/CX pin of ST7735R is active low (transmission command byte).
25      If connected directly the MCU pin should be configured
26      as active low.
27
28  x-offset:
29    type: int
30    required: true
31    description: The column offset in pixels of the LCD to the controller memory
32
33  y-offset:
34    type: int
35    required: true
36    description: The row offset in pixels of the LCD to the controller memory
37
38  madctl:
39    type: int
40    default: 0x00
41    description: Memory Data Access Control
42
43  colmod:
44    type: int
45    default: 0x06
46    description: Interface Pixel Format
47
48  pwctr1:
49    type: uint8-array
50    default: [0xb4, 0x14, 0x04]
51    description: Power Control 1 Parameter
52
53  pwctr2:
54    type: uint8-array
55    default: [0xc0]
56    description: Power Control 2 Parameter
57
58  pwctr3:
59    type: uint8-array
60    default: [0x0a, 0x00]
61    description: Power Control 3 Parameter
62
63  pwctr4:
64    type: uint8-array
65    default: [0x8a, 0x26]
66    description: Power Control 4 Parameter
67
68  pwctr5:
69    type: uint8-array
70    default: [0x8a, 0xee]
71    description: Power Control 5 Parameter
72
73  gamctrp1:
74    type: uint8-array
75    required: true
76    description: Positive Voltage Gamma Control Parameter
77
78  gamctrn1:
79    type: uint8-array
80    required: true
81    description: Negative Voltage Gamma Control Parameter
82
83  frmctr1:
84    type: uint8-array
85    default: [0x05, 0x3a, 0x3a]
86    description: Frame rate control (normal mode / full colors)
87
88  frmctr2:
89    type: uint8-array
90    default: [0x05, 0x3a, 0x3a]
91    description: Frame rate control (idle mode / 8 colors)
92
93  frmctr3:
94    type: uint8-array
95    default: [0x05, 0x3a, 0x3a, 0x05, 0x3a, 0x3a]
96    description: Frame rate control (partial mode / full colors)
97
98  caset:
99    type: uint8-array
100    default: [0x00, 0x00, 0x00, 0x7f]
101    description: Column Address Set
102
103  raset:
104    type: uint8-array
105    default: [0x00, 0x00, 0x00, 0x9f]
106    description: Row Address Set
107
108  vmctr1:
109    type: int
110    default: 0x0a
111    description: VCOM Control 1
112
113  invctr:
114    type: int
115    default: 0x07
116    description: |
117      Display Inversion Control
118      Set dot inversion or line inversion for each normal/idle/partial mode.
119
120  inversion-on:
121    type: boolean
122    description: |
123      Enable Display Inversion
124      Make a drawing with the inverted color of the frame memory.
125
126  rgb-is-inverted:
127    type: boolean
128    description: |
129      Inverting color format order (RGB->BGR or BGR->RGB)
130      In the case of enabling this option, API reports pixel-format in capabilities
131      as the inverted value of the RGB pixel-format specified in MADCTL.
132      This option is convenient for supporting displays with bugs
133      where the actual color is different from the pixel format of MADCTL.
134