1/*
2 * Copyright 2020 Broadcom
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/ {
8	soc {
9		sram0: memory@400000 {
10			device_type = "memory";
11			reg = <0x00400000 0x80000>;
12		};
13
14		uart0: uart@40020000 {
15			compatible = "ns16550";
16			reg = <0x40020000 0x400>;
17			reg-shift = <2>;
18			clock-frequency = <25000000>;
19			status = "disabled";
20		};
21
22		uart1: uart@48100000 {
23			compatible = "ns16550";
24			reg = <0x48100000 0x400>;
25			reg-shift = <2>;
26			clock-frequency = <100000000>;
27			status = "disabled";
28		};
29
30		pl330: pl330@48300000 {
31			compatible = "arm,dma-pl330";
32			reg = <0x48300000 0x2000>,
33			      <0x482f005c 0x20>;
34			reg-names = "pl330_regs",
35				    "control_regs";
36			microcode = <0x63b00000  0x1000>;
37			dma-channels = <8>;
38			#dma-cells = <1>;
39		};
40	};
41
42	pcie {
43		#address-cells = <2>;
44		#size-cells = <2>;
45
46		pcie0_ep: pcie@4e100000 {
47			compatible = "brcm,iproc-pcie-ep";
48			reg = <0x0 0x4e100000 0x0 0x2100>,
49			      <0x0 0x50000000 0x0 0x8000000>,
50			      <0x4 0x0 0x0 0x8000000>;
51			reg-names = "iproc_pcie_regs", "map_lowmem",
52				    "map_highmem";
53			dmas = <&pl330 0>, <&pl330 1>;
54			dma-names = "txdma", "rxdma";
55		};
56
57		paxdma: paxdma@4e100800 {
58			compatible = "brcm,iproc-pax-dma-v2";
59			reg = <0x0 0x4e100800 0x0 0x2100>,
60			      <0x0 0x4f000000 0x0 0x200000>,
61			      <0x0 0x4f200000 0x0 0x10000>;
62			reg-names = "dme_regs", "rm_ring_regs",
63				    "rm_comm_regs";
64			dma-channels = <4>;
65			#dma-cells = <1>;
66			bd-memory = <0x63b00000 0x100000>;
67			scr-addr-loc = <0x200061f0>;
68			scr-size-loc = <0x200061f8>;
69			pcie-ep = <&pcie0_ep>;
70		};
71	};
72};
73