1/*
2 * Copyright 2020 Broadcom
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <arm64/armv8-a.dtsi>
8#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
9
10#include "viper-common.dtsi"
11
12/ {
13	cpus {
14		#address-cells = <1>;
15		#size-cells = <0>;
16
17		cpu@0 {
18			device_type = "cpu";
19			compatible = "arm,cortex-a72";
20			reg = <0>;
21		};
22	};
23
24	timer {
25		compatible = "arm,armv8-timer";
26		interrupt-parent = <&gic>;
27		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL
28			      IRQ_DEFAULT_PRIORITY>,
29			     <GIC_PPI 14 IRQ_TYPE_LEVEL
30			      IRQ_DEFAULT_PRIORITY>,
31			     <GIC_PPI 11 IRQ_TYPE_LEVEL
32			      IRQ_DEFAULT_PRIORITY>,
33			     <GIC_PPI 10 IRQ_TYPE_LEVEL
34			      IRQ_DEFAULT_PRIORITY>;
35	};
36
37	soc {
38		gic: interrupt-controller@42700000 {
39			compatible = "arm,gic-v3", "arm,gic";
40			reg = <0x42700000 0x010000>,
41			      <0x42780000 0x600000>;
42			interrupt-controller;
43			#interrupt-cells = <4>;
44			status = "okay";
45		};
46	};
47};
48
49&uart0 {
50	interrupt-parent = <&gic>;
51	interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL
52		      IRQ_DEFAULT_PRIORITY>;
53};
54
55&uart1 {
56	interrupt-parent = <&gic>;
57	interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL
58		      IRQ_DEFAULT_PRIORITY>;
59};
60
61&paxdma {
62	interrupt-parent = <&gic>;
63	interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL
64		      IRQ_DEFAULT_PRIORITY>;
65};
66