1/*
2 * Copyright (c) 2020 Alexander Mihajlovic <a@abxy.se>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <st/l0/stm32l0.dtsi>
8
9/ {
10	soc {
11		compatible = "st,stm32l071", "st,stm32l0", "simple-bus";
12
13		pinctrl: pin-controller@50000000 {
14			gpioe: gpio@50001000 {
15				compatible = "st,stm32-gpio";
16				gpio-controller;
17				#gpio-cells = <2>;
18				reg = <0x50001000 0x400>;
19				clocks = <&rcc STM32_CLOCK_BUS_IOP 0x00000010>;
20			};
21		};
22
23		i2c2: i2c@40005800 {
24			compatible = "st,stm32-i2c-v2";
25			clock-frequency = <I2C_BITRATE_STANDARD>;
26			#address-cells = <1>;
27			#size-cells = <0>;
28			reg = <0x40005800 0x400>;
29			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>;
30			interrupts = <24 0>;
31			interrupt-names = "combined";
32			status = "disabled";
33		};
34
35		i2c3: i2c@40007800 {
36			compatible = "st,stm32-i2c-v2";
37			clock-frequency = <I2C_BITRATE_STANDARD>;
38			#address-cells = <1>;
39			#size-cells = <0>;
40			reg = <0x40007800 0x400>;
41			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x40000000>;
42			interrupts = <21 0>;
43			interrupt-names = "combined";
44			status = "disabled";
45		};
46
47		spi2: spi@40003800 {
48			compatible = "st,stm32-spi";
49			#address-cells = <1>;
50			#size-cells = <0>;
51			reg = <0x40003800 0x400>;
52			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
53			interrupts = <26 3>;
54			status = "disabled";
55		};
56
57		timers3: timers@40000400 {
58			compatible = "st,stm32-timers";
59			reg = <0x40000400 0x400>;
60			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000002>;
61			resets = <&rctl STM32_RESET(APB1, 1U)>;
62			interrupts = <16 0>;
63			interrupt-names = "global";
64			st,prescaler = <0>;
65			status = "disabled";
66
67			pwm {
68				compatible = "st,stm32-pwm";
69				status = "disabled";
70				#pwm-cells = <3>;
71			};
72
73			counter {
74				compatible = "st,stm32-counter";
75				status = "disabled";
76			};
77		};
78
79		timers6: timers@40001000 {
80			compatible = "st,stm32-timers";
81			reg = <0x40001000 0x400>;
82			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000010>;
83			resets = <&rctl STM32_RESET(APB1, 4U)>;
84			interrupts = <17 0>;
85			interrupt-names = "global";
86			st,prescaler = <0>;
87			status = "disabled";
88
89			counter {
90				compatible = "st,stm32-counter";
91				status = "disabled";
92			};
93		};
94
95		timers7: timers@40001400 {
96			compatible = "st,stm32-timers";
97			reg = <0x40001400 0x400>;
98			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000020>;
99			resets = <&rctl STM32_RESET(APB1, 5U)>;
100			interrupts = <18 0>;
101			interrupt-names = "global";
102			st,prescaler = <0>;
103			status = "disabled";
104
105			counter {
106				compatible = "st,stm32-counter";
107				status = "disabled";
108			};
109		};
110
111		timers22: timers@40011400 {
112			compatible = "st,stm32-timers";
113			reg = <0x40011400 0x400>;
114			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000020>;
115			resets = <&rctl STM32_RESET(APB2, 5U)>;
116			interrupts = <22 0>;
117			interrupt-names = "global";
118			st,prescaler = <0>;
119			status = "disabled";
120
121			pwm {
122				compatible = "st,stm32-pwm";
123				status = "disabled";
124				#pwm-cells = <3>;
125			};
126
127			counter {
128				compatible = "st,stm32-counter";
129				status = "disabled";
130			};
131		};
132
133		usart1: serial@40013800 {
134			compatible = "st,stm32-usart", "st,stm32-uart";
135			reg = <0x40013800 0x400>;
136			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00004000>;
137			resets = <&rctl STM32_RESET(APB2, 14U)>;
138			interrupts = <27 0>;
139			status = "disabled";
140		};
141
142		usart4: serial@40004c00 {
143			compatible = "st,stm32-usart", "st,stm32-uart";
144			reg = <0x40004c00 0x400>;
145			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>;
146			resets = <&rctl STM32_RESET(APB1, 19U)>;
147			interrupts = <14 0>;
148			status = "disabled";
149		};
150
151		usart5: serial@40005000 {
152			compatible = "st,stm32-usart", "st,stm32-uart";
153			reg = <0x40005000 0x400>;
154			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>;
155			resets = <&rctl STM32_RESET(APB1, 20U)>;
156			interrupts = <14 0>;
157			status = "disabled";
158		};
159
160		eeprom: eeprom@8080000{
161			reg = <0x08080000 DT_SIZE_K(6)>;
162		};
163	};
164};
165