1/*
2 * Copyright (c) 2021 IoT.bzh
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <mem.h>
8#include <arm/armv7-r.dtsi>
9#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
10#include <zephyr/dt-bindings/clock/renesas_cpg_mssr.h>
11#include <zephyr/dt-bindings/gpio/gpio.h>
12#include <zephyr/dt-bindings/i2c/i2c.h>
13#include <zephyr/dt-bindings/pwm/pwm.h>
14
15/ {
16	cpus {
17		#address-cells = <1>;
18		#size-cells = <0>;
19
20		cpu@0 {
21			device_type = "cpu";
22			compatible = "arm,cortex-r7";
23			reg = <0>;
24		};
25	};
26
27	soc {
28		sram0: memory@40040000 {
29			compatible = "mmio-sram";
30			reg = <0x40040000 0x1fc0000>;
31		};
32
33		gic: interrupt-controller@f1110000 {
34			compatible = "arm,gic-v2", "arm,gic";
35			reg = <0xf1110000 0x1000>,
36			      <0xf1120000 0x20000>,
37			      <0xf1140000 0x20000>,
38			      <0xf1060000 0x20000>;
39			interrupt-controller;
40			#interrupt-cells = <4>;
41			status = "okay";
42		};
43
44		gpio5: gpio@e6055000 {
45			compatible = "renesas,rcar-gpio";
46			reg = <0xe6055000 0x50>;
47			#gpio-cells = <2>;
48			gpio-controller;
49			interrupt-parent = <&gic>;
50			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
51			clocks = <&cpg CPG_MOD 907>;
52			status = "disabled";
53		};
54
55		gpio6: gpio@e6055400 {
56			compatible = "renesas,rcar-gpio";
57			reg = <0xe6055400 0x50>;
58			#gpio-cells = <2>;
59			gpio-controller;
60			interrupt-parent = <&gic>;
61			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
62			clocks = <&cpg CPG_MOD 906>;
63			status = "disabled";
64		};
65
66		pfc: pin-controller@e6060000 {
67			compatible = "renesas,rcar-pfc";
68			reg = <0xe6060000 0x50c>;
69		};
70
71		pwm0: pwm@e6e30000 {
72			compatible = "renesas,pwm-rcar";
73			reg = <0xe6e30000 0x8>;
74			#pwm-cells = <3>;
75			status = "disabled";
76		};
77
78		cmt0: timer@e60f0500 {
79			compatible = "renesas,rcar-cmt";
80			interrupt-parent = <&gic>;
81			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL
82					IRQ_DEFAULT_PRIORITY>,
83				     <GIC_SPI 143 IRQ_TYPE_LEVEL
84					IRQ_DEFAULT_PRIORITY>;
85			interrupt-names = "irq_0", "irq_1";
86			reg = <0xe60f0500 0x1004>;
87			clocks = <&cpg CPG_MOD 303>;
88			status = "disabled";
89		};
90
91		can0: can@e6c30000 {
92			compatible = "renesas,rcar-can";
93			reg = <0xe6c30000 0x1000>;
94			interrupt-parent = <&gic>;
95			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL
96					IRQ_DEFAULT_PRIORITY>;
97			sample-point = <875>;
98			status = "disabled";
99		};
100
101		i2c2: i2c@e6510000 {
102			compatible = "renesas,rcar-i2c";
103			clock-frequency = <I2C_BITRATE_STANDARD>;
104			#address-cells = <1>;
105			#size-cells = <0>;
106			reg = <0xe6510000 0x40>;
107			interrupt-parent = <&gic>;
108			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL
109					IRQ_DEFAULT_PRIORITY>;
110			clocks = <&cpg CPG_MOD 929>;
111			status = "disabled";
112		};
113
114		i2c4: i2c@e66d8000 {
115			compatible = "renesas,rcar-i2c";
116			clock-frequency = <I2C_BITRATE_STANDARD>;
117			#address-cells = <1>;
118			#size-cells = <0>;
119			reg = <0xe66d8000 0x40>;
120			interrupt-parent = <&gic>;
121			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL
122					IRQ_DEFAULT_PRIORITY>;
123			clocks = <&cpg CPG_MOD 927>;
124			status = "disabled";
125		};
126
127		scif1: serial@e6e68000 {
128			compatible = "renesas,rcar-scif";
129			reg = <0xe6e68000 0x64>;
130			interrupt-parent = <&gic>;
131			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL
132					IRQ_DEFAULT_PRIORITY>;
133			current-speed = <115200>;
134			status = "disabled";
135		};
136
137		scif2: serial@e6e88000 {
138			compatible = "renesas,rcar-scif";
139			reg = <0xe6e88000 0x64>;
140			interrupt-parent = <&gic>;
141			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL
142					IRQ_DEFAULT_PRIORITY>;
143			current-speed = <115200>;
144			status = "disabled";
145		};
146	};
147};
148