1/*
2 * Copyright 2022 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <arm/armv8-m.dtsi>
8#include <zephyr/dt-bindings/adc/adc.h>
9#include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
10#include <zephyr/dt-bindings/gpio/gpio.h>
11#include <zephyr/dt-bindings/i2c/i2c.h>
12#include <zephyr/dt-bindings/inputmux/inputmux_trigger_ports.h>
13#include <mem.h>
14
15/ {
16	chosen {
17		zephyr,entropy = &css;
18	};
19
20	cpus {
21		#address-cells = <1>;
22		#size-cells = <0>;
23
24		cpu@0 {
25			compatible = "arm,cortex-m33f";
26			reg = <0>;
27			#address-cells = <1>;
28			#size-cells = <1>;
29
30			mpu: mpu@e000ed90 {
31				compatible = "arm,armv8m-mpu";
32				reg = <0xe000ed90 0x40>;
33				arm,num-mpu-regions = <8>;
34			};
35		};
36	};
37};
38
39&sram {
40	#address-cells = <1>;
41	#size-cells = <1>;
42
43	/* lpc55_3x Memory configurations:
44	 *
45	 * LPC55x36: RAMX: 16K, SRAM0: 16K, SRAM1: 16K, SRAM2: 32K, SRAM3: 32K, SRAM4: 16K
46	 */
47	sramx: memory@4000000 {
48		compatible = "mmio-sram";
49		reg = <0x04000000 DT_SIZE_K(16)>;
50	};
51	sram0: memory@20000000 {
52		compatible = "mmio-sram";
53		reg = <0x20000000 DT_SIZE_K(16)>;
54	};
55	sram1: memory@20004000 {
56		compatible = "mmio-sram";
57		reg = <0x20004000 DT_SIZE_K(16)>;
58	};
59	sram2: memory@20008000 {
60		compatible = "mmio-sram";
61		reg = <0x20008000 DT_SIZE_K(32)>;
62	};
63	sram3: memory@20010000 {
64		compatible = "mmio-sram";
65		reg = <0x20010000 DT_SIZE_K(32)>;
66	};
67	sram4: memory@20018000 {
68		compatible = "mmio-sram";
69		reg = <0x20018000 DT_SIZE_K(16)>;
70	};
71};
72
73&peripheral {
74	#address-cells = <1>;
75	#size-cells = <1>;
76
77	syscon: syscon@0 {
78		compatible = "nxp,lpc-syscon";
79		reg = <0x0 0x1000>;
80		#clock-cells = <1>;
81	};
82
83	iap: flash-controller@34000 {
84		compatible = "nxp,iap-fmc553";
85		reg = <0x34000 0x1000>;
86		#address-cells = <1>;
87		#size-cells = <1>;
88		status = "ok";
89
90		flash0: flash@0 {
91			compatible = "soc-nv-flash";
92			reg = <0x0 DT_SIZE_K(246)>;
93			erase-block-size = <512>;
94			write-block-size = <512>;
95		};
96
97		flash_reserved: flash@3d800 {
98			compatible = "soc-nv-flash";
99			reg = <0x0003d800 DT_SIZE_K(10)>;
100			status = "disabled";
101		};
102
103		boot_rom: flash@3000000 {
104			compatible = "soc-nv-flash";
105			reg = <0x3000000 DT_SIZE_K(128)>;
106		};
107	};
108
109	iocon: iocon@1000 {
110		compatible = "nxp,lpc-iocon";
111		reg = <0x1000 0x100>;
112		#address-cells = <1>;
113		#size-cells = <1>;
114		ranges = <0x0 0x1000 0x100>;
115		pinctrl: pinctrl {
116			compatible = "nxp,lpc-iocon-pinctrl";
117		};
118	};
119
120	gpio0: gpio@0 {
121		compatible = "nxp,lpc-gpio";
122		reg = <0x8c000 0x278c>;
123		int-source = "pint";
124		gpio-controller;
125		#gpio-cells = <2>;
126		port = <0>;
127	};
128
129	gpio1: gpio@1 {
130		compatible = "nxp,lpc-gpio";
131		reg = <0x8c000 0x278c>;
132		int-source = "pint";
133		gpio-controller;
134		#gpio-cells = <2>;
135		port = <1>;
136	};
137
138	gpio2: gpio@2 {
139		compatible = "nxp,lpc-gpio";
140		reg = <0x8c000 0x278c>;
141		gpio-controller;
142		#gpio-cells = <2>;
143		port = <2>;
144	};
145
146	dma0: dma-controller@82000 {
147		compatible = "nxp,lpc-dma";
148		reg = <0x82000 0x1000>;
149		interrupts = <1 0>;
150		dma-channels = <52>;
151		nxp,dma-num-of-otrigs = <4>;
152		nxp,dma-otrig-base-address = <LPC55S36_DMA0_OTRIG_BASE>;
153		nxp,dma-itrig-base-address = <LPC55S36_DMA0_ITRIG_BASE>;
154		status = "disabled";
155		#dma-cells = <1>;
156	};
157
158	dma1: dma-controller@a7000 {
159		compatible = "nxp,lpc-dma";
160		reg = <0xa7000 0x1000>;
161		interrupts = <58 0>;
162		dma-channels = <16>;
163		nxp,dma-num-of-otrigs = <4>;
164		nxp,dma-otrig-base-address = <LPC55S36_DMA1_OTRIG_BASE>;
165		nxp,dma-itrig-base-address = <LPC55S36_DMA1_ITRIG_BASE>;
166		status = "disabled";
167		#dma-cells = <1>;
168	};
169
170	pint: pint@4000 {
171		compatible = "nxp,pint";
172		reg = <0x4000 0x1000>;
173		interrupt-controller;
174		#interrupt-cells = <1>;
175		#address-cells = <0>;
176		interrupts = <4 2>, <5 2>, <6 2>, <7 2>,
177			<32 2>, <33 2>, <34 2>, <35 2>;
178		num-lines = <8>;
179		num-inputs = <64>;
180	};
181
182	flexcomm0: flexcomm@86000 {
183		compatible = "nxp,lpc-flexcomm";
184		reg = <0x86000 0x1000>;
185		interrupts = <14 0>;
186		clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
187		dmas = <&dma0 4>, <&dma0 5>;
188		dma-names = "rx", "tx";
189		status = "disabled";
190	};
191
192	flexcomm1: flexcomm@87000 {
193		compatible = "nxp,lpc-flexcomm";
194		reg = <0x87000 0x1000>;
195		interrupts = <15 0>;
196		clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
197		dmas = <&dma0 6>, <&dma0 7>;
198		dma-names = "rx", "tx";
199		status = "disabled";
200	};
201
202	flexcomm2: flexcomm@88000 {
203		compatible = "nxp,lpc-flexcomm";
204		reg = <0x88000 0x1000>;
205		interrupts = <16 0>;
206		clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
207		dmas = <&dma0 10>, <&dma0 11>;
208		dma-names = "rx", "tx";
209		status = "disabled";
210	};
211
212	flexcomm3: flexcomm@89000 {
213		compatible = "nxp,lpc-flexcomm";
214		reg = <0x89000 0x1000>;
215		interrupts = <17 0>;
216		clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
217		dmas = <&dma0 8>, <&dma0 9>;
218		dma-names = "rx", "tx";
219		status = "disabled";
220	};
221
222	flexcomm4: flexcomm@8a000 {
223		compatible = "nxp,lpc-flexcomm";
224		reg = <0x8a000 0x1000>;
225		interrupts = <18 0>;
226		clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
227		dmas = <&dma0 12>, <&dma0 13>;
228		dma-names = "rx", "tx";
229		status = "disabled";
230	};
231
232	flexcomm5: flexcomm@96000 {
233		compatible = "nxp,lpc-flexcomm";
234		reg = <0x96000 0x1000>;
235		interrupts = <19 0>;
236		clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
237		dmas = <&dma0 14>, <&dma0 15>;
238		dma-names = "rx", "tx";
239		status = "disabled";
240	};
241
242	flexcomm6: flexcomm@97000 {
243		compatible = "nxp,lpc-flexcomm";
244		reg = <0x97000 0x1000>;
245		interrupts = <20 0>;
246		clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
247		dmas = <&dma0 16>, <&dma0 17>;
248		dma-names = "rx", "tx";
249		status = "disabled";
250	};
251
252	flexcomm7: flexcomm@98000 {
253		compatible = "nxp,lpc-flexcomm";
254		reg = <0x98000 0x1000>;
255		interrupts = <21 0>;
256		clocks = <&syscon MCUX_FLEXCOMM7_CLK>;
257		dmas = <&dma0 18>, <&dma0 19>;
258		dma-names = "rx", "tx";
259		status = "disabled";
260	};
261
262	hs_lspi: spi@9f000 {
263		compatible = "nxp,lpc-spi";
264		reg = <0x9f000 0x1000>;
265		interrupts = <59 0>;
266		clocks = <&syscon MCUX_HS_SPI_CLK>;
267		dmas = <&dma0 2>, <&dma0 3>;
268		dma-names = "rx", "tx";
269		status = "disabled";
270		#address-cells = <1>;
271		#size-cells = <0>;
272	};
273
274	css: css@4003000 {
275		compatible = "nxp,css-v2";
276		reg = <0x4003000 0x200>;
277		status = "okay";
278	};
279
280	adc0: adc@A0000 {
281		compatible = "nxp,lpc-lpadc";
282		reg = <0xA0000 0x1000>;
283		interrupts = <22 0>;
284		status = "disabled";
285		clk-divider = <8>;
286		clk-source = <0>;
287		voltage-ref= <1>;
288		calibration-average = <128>;
289		power-level = <0>;
290		offset-value-a = <10>;
291		offset-value-b = <10>;
292		#io-channel-cells = <1>;
293		dmas = <&dma0 21>, <&dma0 22>;
294		dma-names = "adc0-dma0", "adc0-dma1";
295		nxp,reference-supply = <&vref0>;
296	};
297
298	dac0: dac@b2000 {
299		compatible = "nxp,lpdac";
300		reg = < 0xb2000 0x1000>;
301		interrupts = <74 0>;
302		status = "disabled";
303		voltage-reference = <0>;
304		#io-channel-cells = <1>;
305	};
306
307	dac1: dac@b6000 {
308		compatible = "nxp,lpdac";
309		reg = < 0xb6000 0x1000>;
310		interrupts = <75 0>;
311		status = "disabled";
312		voltage-reference = <0>;
313		#io-channel-cells = <1>;
314	};
315
316	dac2: dac@b9000 {
317		compatible = "nxp,lpdac";
318		reg = < 0xb9000 0x1000>;
319		interrupts = <76 0>;
320		status = "disabled";
321		voltage-reference = <0>;
322		#io-channel-cells = <1>;
323	};
324
325	can0: can@4009d000 {
326		compatible = "nxp,lpc-mcan";
327		reg = <0x4009d000 0x1000>;
328		interrupts = <43 0>, <44 0>;
329		clocks = <&syscon MCUX_MCAN_CLK>;
330		bosch,mram-cfg = <0x0 15 15 8 8 0 15 15>;
331		sample-point = <875>;
332		sample-point-data = <875>;
333		status = "disabled";
334	};
335
336	flexpwm0: flexpwm@400C3000 {
337		compatible = "nxp,flexpwm";
338		reg = <0x400C3000 0x1000>;
339		interrupt-names = "INPUT-CAPTURE", "FAULT", "RELOAD-ERROR";
340		interrupts = <80 0>, <81 0>, <82 0>;
341		flexpwm0_pwm0: pwm0 {
342			compatible = "nxp,imx-pwm";
343			index = <0>;
344			interrupt-names = "COMPARE-SUB0", "RELOAD-SUB0";
345			interrupts = <83 0>, <84 0>;
346			#pwm-cells = <3>;
347			clocks = <&syscon MCUX_BUS_CLK 0 0>;
348			nxp,prescaler = <128>;
349			status = "disabled";
350			run-in-wait;
351		};
352
353		flexpwm0_pwm1: pwm1 {
354			compatible = "nxp,imx-pwm";
355			index = <1>;
356			interrupt-names = "COMPARE-SUB1", "RELOAD-SUB1";
357			interrupts = <85 0>, <86 0>;
358			#pwm-cells = <3>;
359			clocks = <&syscon MCUX_BUS_CLK 0 0>;
360			nxp,prescaler = <128>;
361			status = "disabled";
362			run-in-wait;
363		};
364
365		flexpwm0_pwm2: pwm2 {
366			compatible = "nxp,imx-pwm";
367			index = <2>;
368			interrupt-names = "COMPARE-SUB2", "RELOAD-SUB2";
369			interrupts = <87 0>, <88 0>;
370			#pwm-cells = <3>;
371			clocks = <&syscon MCUX_BUS_CLK 0 0>;
372			nxp,prescaler = <128>;
373			status = "disabled";
374			run-in-wait;
375		};
376
377		flexpwm0_pwm3: pwm3 {
378			compatible = "nxp,imx-pwm";
379			index = <3>;
380			interrupt-names = "COMPARE-SUB3", "RELOAD-SUB3";
381			interrupts = <89 0>, <90 0>;
382			#pwm-cells = <3>;
383			clocks = <&syscon MCUX_BUS_CLK 0 0>;
384			nxp,prescaler = <128>;
385			status = "disabled";
386			run-in-wait;
387		};
388	};
389
390
391	flexpwm1: flexpwm@400C5000 {
392		compatible = "nxp,flexpwm";
393		reg = <0x400C5000 0x1000>;
394		interrupt-names = "INPUT-CAPTURE", "FAULT", "RELOAD-ERROR";
395		interrupts = <91 0>, <92 0>, <93 0>;
396		flexpwm1_pwm0: pwm0 {
397			compatible = "nxp,imx-pwm";
398			index = <0>;
399			interrupt-names = "COMPARE-SUB0", "RELOAD-SUB0";
400			interrupts = <94 0>, <95 0>;
401			#pwm-cells = <3>;
402			clocks = <&syscon MCUX_BUS_CLK 0 0>;
403			nxp,prescaler = <128>;
404			status = "disabled";
405			run-in-wait;
406		};
407
408		flexpwm1_pwm1: pwm1 {
409			compatible = "nxp,imx-pwm";
410			index = <1>;
411			interrupt-names = "COMPARE-SUB1", "RELOAD-SUB1";
412			interrupts = <96 0>, <97 0>;
413			#pwm-cells = <3>;
414			clocks = <&syscon MCUX_BUS_CLK 0 0>;
415			nxp,prescaler = <128>;
416			status = "disabled";
417			run-in-wait;
418		};
419
420		flexpwm1_pwm2: pwm2 {
421			compatible = "nxp,imx-pwm";
422			index = <2>;
423			interrupt-names = "COMPARE-SUB2", "RELOAD-SUB2";
424			interrupts = <98 0>, <99 0>;
425			#pwm-cells = <3>;
426			clocks = <&syscon MCUX_BUS_CLK 0 0>;
427			nxp,prescaler = <128>;
428			status = "disabled";
429			run-in-wait;
430		};
431
432		flexpwm1_pwm3: pwm3 {
433			compatible = "nxp,imx-pwm";
434			index = <3>;
435			interrupt-names = "COMPARE-SUB3", "RELOAD-SUB3";
436			interrupts = <100 0>, <101 0>;
437			#pwm-cells = <3>;
438			clocks = <&syscon MCUX_BUS_CLK 0 0>;
439			nxp,prescaler = <128>;
440			status = "disabled";
441			run-in-wait;
442		};
443	};
444
445	usbfs: usbfs@84000 {
446		compatible = "nxp,mcux-usbd";
447		reg = <0x84000 0x1000>;
448		interrupts = <28 0>;
449		num-bidir-endpoints = <5>;
450		maximum-speed = "full-speed";
451		usb-controller-index = "LpcIp3511Fs0";
452		status = "disabled";
453	};
454
455	sc_timer: pwm@85000 {
456		compatible = "nxp,sctimer-pwm";
457		reg = <0x85000 0x1000>;
458		interrupts = <12 0>;
459		status = "disabled";
460		clocks = <&syscon MCUX_SCTIMER_CLK 0 0>;
461		prescaler = <2>;
462		#pwm-cells = <3>;
463	};
464
465	vref0: vref@b5000 {
466		compatible = "nxp,vref";
467		regulator-name = "lpc55s36-vref";
468		reg = <0xb5000 0x30>;
469		status = "disabled";
470		nxp,buffer-startup-delay-us = <400>;
471		nxp,bandgap-startup-time-us = <20>;
472	};
473};
474
475&nvic {
476	arm,num-irq-priority-bits = <3>;
477};
478