1/* 2 * Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk> 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <arm/armv8-m.dtsi> 8#include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h> 9#include <zephyr/dt-bindings/gpio/gpio.h> 10#include <zephyr/dt-bindings/i2c/i2c.h> 11#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h> 12#include <mem.h> 13 14/ { 15 cpus { 16 #address-cells = <1>; 17 #size-cells = <0>; 18 19 cpu@0 { 20 compatible = "arm,cortex-m33f"; 21 reg = <0>; 22 #address-cells = <1>; 23 #size-cells = <1>; 24 25 mpu: mpu@e000ed90 { 26 compatible = "arm,armv8m-mpu"; 27 reg = <0xe000ed90 0x40>; 28 arm,num-mpu-regions = <8>; 29 }; 30 }; 31 }; 32}; 33 34&sram { 35 #address-cells = <1>; 36 #size-cells = <1>; 37 38 sramx: memory@4000000 { 39 compatible = "mmio-sram"; 40 reg = <0x4000000 DT_SIZE_K(16)>; 41 }; 42 43 sram0: memory@20000000 { 44 compatible = "mmio-sram"; 45 reg = <0x20000000 DT_SIZE_K(32)>; 46 }; 47 48 sram1: memory@20008000 { 49 compatible = "zephyr,memory-region", "mmio-sram"; 50 reg = <0x20008000 DT_SIZE_K(16)>; 51 zephyr,memory-region = "SRAM1"; 52 }; 53 54 sram2: memory@2000c000 { 55 compatible = "zephyr,memory-region", "mmio-sram"; 56 reg = <0x2000c000 DT_SIZE_K(16)>; 57 zephyr,memory-region = "SRAM2"; 58 }; 59 60 usb_sram: memory@20010000 { 61 /* Connected to USB bus*/ 62 compatible = "zephyr,memory-region", "mmio-sram"; 63 reg = <0x20010000 DT_SIZE_K(16)>; 64 zephyr,memory-region = "USB_SRAM"; 65 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>; 66 }; 67}; 68 69&peripheral { 70 #address-cells = <1>; 71 #size-cells = <1>; 72 73 syscon: syscon@0 { 74 compatible = "nxp,lpc-syscon"; 75 reg = <0x0 0x4000>; 76 #clock-cells = <1>; 77 }; 78 79 iap: flash-controller@34000 { 80 compatible = "nxp,iap-fmc55"; 81 reg = <0x34000 0x18>; 82 #address-cells = <1>; 83 #size-cells = <1>; 84 status = "disabled"; 85 86 flash0: flash@0 { 87 compatible = "soc-nv-flash"; 88 reg = <0x0 DT_SIZE_K(246)>; 89 erase-block-size = <512>; 90 write-block-size = <512>; 91 }; 92 93 flash_reserved: flash@3d800 { 94 compatible = "soc-nv-flash"; 95 reg = <0x0003d800 DT_SIZE_K(10)>; 96 status = "disabled"; 97 }; 98 99 uuid: flash@9fc70 { 100 compatible = "nxp,lpc-uid"; 101 reg = <0x3fc70 0x10>; 102 }; 103 104 boot_rom: flash@3000000 { 105 compatible = "soc-nv-flash"; 106 reg = <0x3000000 DT_SIZE_K(128)>; 107 }; 108 }; 109 110 iocon: iocon@1000 { 111 compatible = "nxp,lpc-iocon"; 112 reg = <0x1000 0x100>; 113 #address-cells = <1>; 114 #size-cells = <1>; 115 ranges = <0x0 0x1000 0x100>; 116 pinctrl: pinctrl { 117 compatible = "nxp,lpc-iocon-pinctrl"; 118 }; 119 }; 120 121 gpio0: gpio@0 { 122 compatible = "nxp,lpc-gpio"; 123 reg = <0x8c000 0x2488>; 124 int-source = "pint"; 125 gpio-controller; 126 #gpio-cells = <2>; 127 port = <0>; 128 }; 129 130 gpio1: gpio@1 { 131 compatible = "nxp,lpc-gpio"; 132 reg = <0x8c000 0x2488>; 133 int-source = "pint"; 134 gpio-controller; 135 #gpio-cells = <2>; 136 port = <1>; 137 }; 138 139 pint: pint@4000 { 140 compatible = "nxp,pint"; 141 reg = <0x4000 0x1000>; 142 interrupt-controller; 143 #interrupt-cells = <1>; 144 #address-cells = <0>; 145 interrupts = <4 2>, <5 2>, <6 2>, <7 2>, 146 <32 2>, <33 2>, <34 2>, <35 2>; 147 num-lines = <8>; 148 num-inputs = <64>; 149 }; 150 151 flexcomm0: flexcomm@86000 { 152 compatible = "nxp,lpc-flexcomm"; 153 reg = <0x86000 0x1000>; 154 interrupts = <14 0>; 155 clocks = <&syscon MCUX_FLEXCOMM0_CLK>; 156 status = "disabled"; 157 }; 158 159 flexcomm1: flexcomm@87000 { 160 compatible = "nxp,lpc-flexcomm"; 161 reg = <0x87000 0x1000>; 162 interrupts = <15 0>; 163 clocks = <&syscon MCUX_FLEXCOMM1_CLK>; 164 status = "disabled"; 165 }; 166 167 flexcomm2: flexcomm@88000 { 168 compatible = "nxp,lpc-flexcomm"; 169 reg = <0x88000 0x1000>; 170 interrupts = <16 0>; 171 clocks = <&syscon MCUX_FLEXCOMM2_CLK>; 172 status = "disabled"; 173 }; 174 175 flexcomm3: flexcomm@89000 { 176 compatible = "nxp,lpc-flexcomm"; 177 reg = <0x89000 0x1000>; 178 interrupts = <17 0>; 179 clocks = <&syscon MCUX_FLEXCOMM3_CLK>; 180 status = "disabled"; 181 }; 182 183 flexcomm4: flexcomm@8a000 { 184 compatible = "nxp,lpc-flexcomm"; 185 reg = <0x8a000 0x1000>; 186 interrupts = <18 0>; 187 clocks = <&syscon MCUX_FLEXCOMM4_CLK>; 188 status = "disabled"; 189 }; 190 191 flexcomm5: flexcomm@96000 { 192 compatible = "nxp,lpc-flexcomm"; 193 reg = <0x96000 0x1000>; 194 interrupts = <19 0>; 195 clocks = <&syscon MCUX_FLEXCOMM5_CLK>; 196 status = "disabled"; 197 }; 198 199 flexcomm6: flexcomm@97000 { 200 compatible = "nxp,lpc-flexcomm"; 201 reg = <0x97000 0x1000>; 202 interrupts = <20 0>; 203 clocks = <&syscon MCUX_FLEXCOMM6_CLK>; 204 status = "disabled"; 205 }; 206 207 flexcomm7: flexcomm@98000 { 208 compatible = "nxp,lpc-flexcomm"; 209 reg = <0x98000 0x1000>; 210 interrupts = <21 0>; 211 clocks = <&syscon MCUX_FLEXCOMM7_CLK>; 212 status = "disabled"; 213 }; 214 215 can0: can@9d000 { 216 compatible = "nxp,lpc-mcan"; 217 reg = <0x9d000 0x1000>; 218 interrupts = <43 0>, <44 0>; 219 clocks = <&syscon MCUX_MCAN_CLK>; 220 bosch,mram-cfg = <0x0 15 15 8 8 0 15 15>; 221 sample-point = <875>; 222 sample-point-data = <875>; 223 status = "disabled"; 224 }; 225 226 hs_lspi: spi@9f000 { 227 compatible = "nxp,lpc-spi"; 228 reg = <0x9f000 0x1000>; 229 interrupts = <59 0>; 230 clocks = <&syscon MCUX_HS_SPI_CLK>; 231 status = "disabled"; 232 #address-cells = <1>; 233 #size-cells = <0>; 234 }; 235 236 rng: rng@3a000 { 237 compatible = "nxp,lpc-rng"; 238 reg = <0x3a000 0x1000>; 239 status = "okay"; 240 }; 241 242 usbhs: usbhs@144000 { 243 compatible = "nxp,mcux-usbd"; 244 reg = <0x94000 0x1000>; 245 interrupts = <47 1>; 246 num-bidir-endpoints = <6>; 247 usb-controller-index = "LpcIp3511Hs0"; 248 status = "disabled"; 249 }; 250}; 251 252&nvic { 253 arm,num-irq-priority-bits = <3>; 254}; 255
