1/*
2 * Copyright (c) 2021 Nuvoton Technology Corporation.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/* Common pin-mux configurations in npcx family */
8#include <nuvoton/npcx/npcx-alts-map.dtsi>
9
10/* Specific pin-mux configurations in npcx9 series */
11/ {
12	npcx-alts-map {
13		compatible = "nuvoton,npcx-pinctrl-conf";
14
15		/* SCFG DEVALT 0 */
16		alt0_f_spi_cs1: alt04 {
17			alts = <&scfg 0x00 0x4 0>;
18		};
19		alt0_f_spi_quad: alt06 {
20			alts = <&scfg 0x00 0x6 0>;
21		};
22
23		/* SCFG DEVALT 5 */
24		alt5_jen_lk: alt51 {
25			alts = <&scfg 0x05 0x1 0>;
26		};
27
28		/* SCFG DEVALT E */
29		alte_cr_sin4_sl: alte6 {
30			alts = <&scfg 0x0E 0x6 0>;
31		};
32		alte_cr_sout4_sl: alte7 {
33			alts = <&scfg 0x0E 0x7 0>;
34		};
35
36		/* SCFG DEVALT F */
37		altf_adc10_sl: altf5 {
38			alts = <&scfg 0x0F 0x5 0>;
39		};
40		altf_adc11_sl: altf6 {
41			alts = <&scfg 0x0F 0x6 0>;
42		};
43
44		/* SCFG DEVALT G */
45		altg_vcc1_rst_pud: altg4 {
46			alts = <&scfg 0x10 0x4 0>;
47		};
48		altg_vcc1_rst_pud_lk: altg5 {
49			alts = <&scfg 0x10 0x5 0>;
50		};
51		altg_psl_out_sl: altg6 {
52			alts = <&scfg 0x10 0x6 0>;
53		};
54		altg_psl_gpo_sl: altg7 {
55			alts = <&scfg 0x10 0x7 0>;
56		};
57
58		/* SCFG DEVALT H */
59		alth_i3c_sl: alth1 {
60			alts = <&scfg 0x11 0x1 0>;
61		};
62
63		/*
64		 * Note: DEVALT I is skipped in the datasheet, the offset of
65		 * DEVALT J is 0x12 not 0x13.
66		 */
67		/* SCFG DEVALT J */
68		altj_cr_sin1_sl1: altj0 {
69			alts = <&scfg 0x12 0x0 0>;
70		};
71		altj_cr_sout1_sl1: altj1 {
72			alts = <&scfg 0x12 0x1 0>;
73		};
74		altj_cr_sin1_sl2:  altj2 {
75			alts = <&scfg 0x12 0x2 0>;
76		};
77		altj_cr_sout1_sl2: altj3 {
78			alts = <&scfg 0x12 0x3 0>;
79		};
80		altj_cr_sin2_sl: altj4 {
81			alts = <&scfg 0x12 0x4 0>;
82		};
83		altj_cr_sout2_sl: altj5 {
84			alts = <&scfg 0x12 0x5 0>;
85		};
86		altj_cr_sin3_sl: altj6 {
87			alts = <&scfg 0x12 0x6 0>;
88		};
89		altj_cr_sout3_sl: altj7 {
90			alts = <&scfg 0x12 0x7 0>;
91		};
92	};
93};
94