1/*
2 * Copyright (c) 2019 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <arm/armv8-m.dtsi>
8#include "nrf_common.dtsi"
9
10/ {
11	chosen {
12		zephyr,entropy = &rng;
13		zephyr,flash-controller = &flash_controller;
14	};
15
16	cpus {
17		#address-cells = <1>;
18		#size-cells = <0>;
19
20		cpu@1 {
21			device_type = "cpu";
22			compatible = "arm,cortex-m33";
23			reg = <1>;
24			#address-cells = <1>;
25			#size-cells = <1>;
26
27			mpu: mpu@e000ed90 {
28				compatible = "arm,armv8m-mpu";
29				reg = <0xe000ed90 0x40>;
30			};
31		};
32	};
33
34	soc {
35		ficr: ficr@1ff0000 {
36			compatible = "nordic,nrf-ficr";
37			reg = <0x01ff0000 0x1000>;
38			status = "okay";
39		};
40
41		uicr: uicr@1ff8000 {
42			compatible = "nordic,nrf-uicr";
43			reg = <0x01ff8000 0x1000>;
44			status = "okay";
45		};
46
47		sram0: memory@20000000 {
48			compatible = "mmio-sram";
49		};
50
51		sram1: memory@21000000 {
52			compatible = "zephyr,memory-region", "mmio-sram";
53			zephyr,memory-region = "SRAM1";
54		};
55
56		clock: clock@41005000 {
57			compatible = "nordic,nrf-clock";
58			reg = <0x41005000 0x1000>;
59			interrupts = <5 NRF_DEFAULT_IRQ_PRIORITY>;
60			status = "okay";
61		};
62
63		power: power@41005000 {
64			compatible = "nordic,nrf-power";
65			reg = <0x41005000 0x1000>;
66			interrupts = <5 NRF_DEFAULT_IRQ_PRIORITY>;
67			status = "okay";
68			#address-cells = <1>;
69			#size-cells = <1>;
70
71			gpregret1: gpregret1@4100551c {
72				#address-cells = <1>;
73				#size-cells = <1>;
74				compatible = "nordic,nrf-gpregret";
75				reg = <0x4100551c 0x1>;
76				status = "okay";
77			};
78
79			gpregret2: gpregret2@41005520 {
80				#address-cells = <1>;
81				#size-cells = <1>;
82				compatible = "nordic,nrf-gpregret";
83				reg = <0x41005520 0x1>;
84				status = "okay";
85			};
86		};
87
88		radio: radio@41008000 {
89			compatible = "nordic,nrf-radio";
90			reg = <0x41008000 0x1000>;
91			interrupts = <8 NRF_DEFAULT_IRQ_PRIORITY>;
92			status = "okay";
93			dfe-supported;
94			ieee802154-supported;
95			ble-2mbps-supported;
96			ble-coded-phy-supported;
97
98			ieee802154: ieee802154 {
99				compatible = "nordic,nrf-ieee802154";
100				status = "disabled";
101			};
102		};
103
104		rng: random@41009000 {
105			compatible = "nordic,nrf-rng";
106			reg = <0x41009000 0x1000>;
107			interrupts = <9 NRF_DEFAULT_IRQ_PRIORITY>;
108			status = "okay";
109		};
110
111		gpiote: gpiote@4100a000 {
112			compatible = "nordic,nrf-gpiote";
113			reg = <0x4100a000 0x1000>;
114			interrupts = <10 5>;
115			status = "disabled";
116		};
117
118		wdt: wdt0: watchdog@4100b000 {
119			compatible = "nordic,nrf-wdt";
120			reg = <0x4100b000 0x1000>;
121			interrupts = <11 NRF_DEFAULT_IRQ_PRIORITY>;
122			status = "okay";
123		};
124
125		timer0: timer@4100c000 {
126			compatible = "nordic,nrf-timer";
127			status = "disabled";
128			reg = <0x4100c000 0x1000>;
129			cc-num = <8>;
130			max-bit-width = <32>;
131			interrupts = <12 NRF_DEFAULT_IRQ_PRIORITY>;
132			prescaler = <0>;
133		};
134
135		ecb: ecb@4100d000 {
136			compatible = "nordic,nrf-ecb";
137			reg = <0x4100d000 0x1000>;
138			interrupts = <13 NRF_DEFAULT_IRQ_PRIORITY>;
139			status = "okay";
140		};
141
142		ccm: ccm@4100e000 {
143			compatible = "nordic,nrf-ccm";
144			reg = <0x4100e000 0x1000>;
145			interrupts = <14 NRF_DEFAULT_IRQ_PRIORITY>;
146			length-field-length-8-bits;
147			headermask-supported;
148			status = "okay";
149		};
150
151		dppic: dppic@4100f000 {
152			compatible = "nordic,nrf-dppic";
153			reg = <0x4100f000 0x1000>;
154			status = "okay";
155		};
156
157		temp: temp@41010000 {
158			compatible = "nordic,nrf-temp";
159			reg = <0x41010000 0x1000>;
160			interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>;
161			status = "okay";
162		};
163
164		rtc0: rtc@41011000 {
165			compatible = "nordic,nrf-rtc";
166			reg = <0x41011000 0x1000>;
167			cc-num = <4>;
168			interrupts = <17 NRF_DEFAULT_IRQ_PRIORITY>;
169			status = "disabled";
170		};
171
172		mbox: ipc: mbox@41012000 {
173			compatible = "nordic,mbox-nrf-ipc", "nordic,nrf-ipc";
174			reg = <0x41012000 0x1000>;
175			tx-mask = <0x0000ffff>;
176			rx-mask = <0x0000ffff>;
177			interrupts = <18 NRF_DEFAULT_IRQ_PRIORITY>;
178			#mbox-cells = <1>;
179			status = "okay";
180		};
181
182		i2c0: i2c@41013000 {
183			/*
184			 * This i2c node can be TWIM or TWIS,
185			 * for the user to pick:
186			 * compatible = "nordic,nrf-twim" or
187			 *              "nordic,nrf-twis".
188			 */
189			compatible = "nordic,nrf-twim";
190			#address-cells = <1>;
191			#size-cells = <0>;
192			reg = <0x41013000 0x1000>;
193			clock-frequency = <I2C_BITRATE_STANDARD>;
194			interrupts = <19 NRF_DEFAULT_IRQ_PRIORITY>;
195			status = "disabled";
196		};
197
198		spi0: spi@41013000 {
199			/*
200			 * This spi node can be SPIM or SPIS,
201			 * for the user to pick:
202			 * compatible = "nordic,nrf-spim" or
203			 *              "nordic,nrf-spis".
204			 */
205			compatible = "nordic,nrf-spim";
206			#address-cells = <1>;
207			#size-cells = <0>;
208			reg = <0x41013000 0x1000>;
209			interrupts = <19 NRF_DEFAULT_IRQ_PRIORITY>;
210			max-frequency = <DT_FREQ_M(8)>;
211			easydma-maxcnt-bits = <16>;
212			status = "disabled";
213		};
214
215		uart0: uart@41013000 {
216			compatible = "nordic,nrf-uarte";
217			reg = <0x41013000 0x1000>;
218			interrupts = <19 NRF_DEFAULT_IRQ_PRIORITY>;
219			status = "disabled";
220		};
221
222		egu0: egu@41014000 {
223			compatible = "nordic,nrf-egu";
224			reg = <0x41014000 0x1000>;
225			interrupts = <20 NRF_DEFAULT_IRQ_PRIORITY>;
226			status = "okay";
227		};
228
229		rtc1: rtc@41016000 {
230			compatible = "nordic,nrf-rtc";
231			reg = <0x41016000 0x1000>;
232			cc-num = <4>;
233			interrupts = <22 NRF_DEFAULT_IRQ_PRIORITY>;
234			status = "disabled";
235		};
236
237		timer1: timer@41018000 {
238			compatible = "nordic,nrf-timer";
239			status = "disabled";
240			reg = <0x41018000 0x1000>;
241			cc-num = <8>;
242			max-bit-width = <32>;
243			interrupts = <24 NRF_DEFAULT_IRQ_PRIORITY>;
244			prescaler = <0>;
245		};
246
247		timer2: timer@41019000 {
248			compatible = "nordic,nrf-timer";
249			status = "disabled";
250			reg = <0x41019000 0x1000>;
251			cc-num = <8>;
252			max-bit-width = <32>;
253			interrupts = <25 NRF_DEFAULT_IRQ_PRIORITY>;
254			prescaler = <0>;
255		};
256
257		swi0: swi@4101a000 {
258			compatible = "nordic,nrf-swi";
259			reg = <0x4101a000 0x1000>;
260			interrupts = <26 NRF_DEFAULT_IRQ_PRIORITY>;
261			status = "okay";
262		};
263
264		swi1: swi@4101b000 {
265			compatible = "nordic,nrf-swi";
266			reg = <0x4101b000 0x1000>;
267			interrupts = <27 NRF_DEFAULT_IRQ_PRIORITY>;
268			status = "okay";
269		};
270
271		swi2: swi@4101c000 {
272			compatible = "nordic,nrf-swi";
273			reg = <0x4101c000 0x1000>;
274			interrupts = <28 NRF_DEFAULT_IRQ_PRIORITY>;
275			status = "okay";
276		};
277
278		swi3: swi@4101d000 {
279			compatible = "nordic,nrf-swi";
280			reg = <0x4101d000 0x1000>;
281			interrupts = <29 NRF_DEFAULT_IRQ_PRIORITY>;
282			status = "okay";
283		};
284
285		acl: acl@41080000 {
286			compatible = "nordic,nrf-acl";
287			reg = <0x41080000 0x1000>;
288			status = "okay";
289		};
290
291		flash_controller: flash-controller@41080000 {
292			compatible = "nordic,nrf53-flash-controller";
293			reg = <0x41080000 0x1000>;
294			partial-erase;
295
296			#address-cells = <1>;
297			#size-cells = <1>;
298
299
300			flash1: flash@1000000 {
301				compatible = "soc-nv-flash";
302				erase-block-size = <2048>;
303				write-block-size = <4>;
304			};
305		};
306
307		vmc: vmc@41081000 {
308			compatible = "nordic,nrf-vmc";
309			reg = <0x41081000 0x1000>;
310			status = "okay";
311		};
312
313		gpio0: gpio@418c0500 {
314			compatible = "nordic,nrf-gpio";
315			gpio-controller;
316			reg = <0x418c0500 0x300>;
317			#gpio-cells = <2>;
318			status = "disabled";
319			port = <0>;
320		};
321
322		gpio1: gpio@418c0800 {
323			compatible = "nordic,nrf-gpio";
324			gpio-controller;
325			reg = <0x418c0800 0x300>;
326			#gpio-cells = <2>;
327			ngpios = <16>;
328			status = "disabled";
329			port = <1>;
330		};
331	};
332
333	/* Default IPC description */
334	ipc {
335		ipc0: ipc0 {
336			compatible = "zephyr,ipc-openamp-static-vrings";
337			memory-region = <&sram0_shared>;
338			mboxes = <&mbox 0>, <&mbox 1>;
339			mbox-names = "rx", "tx";
340			role = "remote";
341			status = "okay";
342		};
343	};
344};
345
346&nvic {
347	arm,num-irq-priority-bits = <3>;
348};
349