1/*
2 * Copyright (c) 2020 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <arm/armv7-m.dtsi>
8#include "nrf_common.dtsi"
9
10/ {
11	chosen {
12		zephyr,entropy = &rng;
13		zephyr,flash-controller = &flash_controller;
14	};
15
16	cpus {
17		#address-cells = <1>;
18		#size-cells = <0>;
19
20		cpu@0 {
21			device_type = "cpu";
22			compatible = "arm,cortex-m4";
23			reg = <0>;
24		};
25	};
26
27	soc {
28		ficr: ficr@10000000 {
29			compatible = "nordic,nrf-ficr";
30			reg = <0x10000000 0x1000>;
31			status = "okay";
32		};
33
34		uicr: uicr@10001000 {
35			compatible = "nordic,nrf-uicr";
36			reg = <0x10001000 0x1000>;
37			status = "okay";
38		};
39
40		sram0: memory@20000000 {
41			compatible = "mmio-sram";
42		};
43
44		clock: clock@40000000 {
45			compatible = "nordic,nrf-clock";
46			reg = <0x40000000 0x1000>;
47			interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>;
48			status = "okay";
49		};
50
51		power: power@40000000 {
52			compatible = "nordic,nrf-power";
53			reg = <0x40000000 0x1000>;
54			interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>;
55			status = "okay";
56			#address-cells = <1>;
57			#size-cells = <1>;
58
59			gpregret1: gpregret1@4000051c {
60				#address-cells = <1>;
61				#size-cells = <1>;
62				compatible = "nordic,nrf-gpregret";
63				reg = <0x4000051c 0x1>;
64				status = "okay";
65			};
66
67			gpregret2: gpregret2@40000520 {
68				#address-cells = <1>;
69				#size-cells = <1>;
70				compatible = "nordic,nrf-gpregret";
71				reg = <0x40000520 0x1>;
72				status = "okay";
73			};
74		};
75
76		bprot: bprot@40000000 {
77			compatible = "nordic,nrf-bprot";
78			reg = <0x40000000 0x1000>;
79			status = "okay";
80		};
81
82		radio: radio@40001000 {
83			compatible = "nordic,nrf-radio";
84			reg = <0x40001000 0x1000>;
85			interrupts = <1 NRF_DEFAULT_IRQ_PRIORITY>;
86			status = "okay";
87			ble-2mbps-supported;
88		};
89
90		uart0: uart@40002000 {
91			/* uart can be either UART or UARTE, for the user to pick */
92			/* compatible = "nordic,nrf-uarte" or "nordic,nrf-uart"; */
93			compatible = "nordic,nrf-uarte";
94			reg = <0x40002000 0x1000>;
95			interrupts = <2 NRF_DEFAULT_IRQ_PRIORITY>;
96			status = "disabled";
97		};
98
99		i2c0: i2c@40003000 {
100			/*
101			 * This i2c node can be TWI, TWIM, or TWIS,
102			 * for the user to pick:
103			 * compatible = "nordic,nrf-twi" or
104			 *              "nordic,nrf-twim" or
105			 *              "nordic,nrf-twis".
106			 */
107			compatible = "nordic,nrf-twim";
108			#address-cells = <1>;
109			#size-cells = <0>;
110			reg = <0x40003000 0x1000>;
111			clock-frequency = <I2C_BITRATE_STANDARD>;
112			interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>;
113			easydma-maxcnt-bits = <14>;
114			status = "disabled";
115		};
116
117		spi0: spi@40004000 {
118			/*
119			 * This spi node can be SPI, SPIM, or SPIS,
120			 * for the user to pick:
121			 * compatible = "nordic,nrf-spi" or
122			 *              "nordic,nrf-spim" or
123			 *              "nordic,nrf-spis".
124			 */
125			compatible = "nordic,nrf-spim";
126			#address-cells = <1>;
127			#size-cells = <0>;
128			reg = <0x40004000 0x1000>;
129			interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>;
130			max-frequency = <DT_FREQ_M(8)>;
131			easydma-maxcnt-bits = <14>;
132			status = "disabled";
133		};
134
135		gpiote: gpiote@40006000 {
136			compatible = "nordic,nrf-gpiote";
137			reg = <0x40006000 0x1000>;
138			interrupts = <6 5>;
139			status = "disabled";
140		};
141
142		adc: adc@40007000 {
143			compatible = "nordic,nrf-saadc";
144			reg = <0x40007000 0x1000>;
145			interrupts = <7 NRF_DEFAULT_IRQ_PRIORITY>;
146			status = "disabled";
147			#io-channel-cells = <1>;
148		};
149
150		timer0: timer@40008000 {
151			compatible = "nordic,nrf-timer";
152			status = "disabled";
153			reg = <0x40008000 0x1000>;
154			cc-num = <4>;
155			max-bit-width = <32>;
156			interrupts = <8 NRF_DEFAULT_IRQ_PRIORITY>;
157			prescaler = <0>;
158		};
159
160		timer1: timer@40009000 {
161			compatible = "nordic,nrf-timer";
162			status = "disabled";
163			reg = <0x40009000 0x1000>;
164			cc-num = <4>;
165			max-bit-width = <32>;
166			interrupts = <9 NRF_DEFAULT_IRQ_PRIORITY>;
167			prescaler = <0>;
168		};
169
170		timer2: timer@4000a000 {
171			compatible = "nordic,nrf-timer";
172			status = "disabled";
173			reg = <0x4000a000 0x1000>;
174			cc-num = <4>;
175			max-bit-width = <32>;
176			interrupts = <10 NRF_DEFAULT_IRQ_PRIORITY>;
177			prescaler = <0>;
178		};
179
180		rtc0: rtc@4000b000 {
181			compatible = "nordic,nrf-rtc";
182			reg = <0x4000b000 0x1000>;
183			cc-num = <3>;
184			interrupts = <11 NRF_DEFAULT_IRQ_PRIORITY>;
185			status = "disabled";
186			clock-frequency = <32768>;
187			prescaler = <1>;
188		};
189
190		temp: temp@4000c000 {
191			compatible = "nordic,nrf-temp";
192			reg = <0x4000c000 0x1000>;
193			interrupts = <12 NRF_DEFAULT_IRQ_PRIORITY>;
194			status = "okay";
195		};
196
197		rng: random@4000d000 {
198			compatible = "nordic,nrf-rng";
199			reg = <0x4000d000 0x1000>;
200			interrupts = <13 NRF_DEFAULT_IRQ_PRIORITY>;
201			status = "okay";
202		};
203
204		ecb: ecb@4000e000 {
205			compatible = "nordic,nrf-ecb";
206			reg = <0x4000e000 0x1000>;
207			interrupts = <14 NRF_DEFAULT_IRQ_PRIORITY>;
208			status = "okay";
209		};
210
211		ccm: ccm@4000f000 {
212			compatible = "nordic,nrf-ccm";
213			reg = <0x4000f000 0x1000>;
214			interrupts = <15 NRF_DEFAULT_IRQ_PRIORITY>;
215			length-field-length-8-bits;
216			status = "okay";
217		};
218
219		wdt: wdt0: watchdog@40010000 {
220			compatible = "nordic,nrf-wdt";
221			reg = <0x40010000 0x1000>;
222			interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>;
223			status = "okay";
224		};
225
226		rtc1: rtc@40011000 {
227			compatible = "nordic,nrf-rtc";
228			reg = <0x40011000 0x1000>;
229			cc-num = <4>;
230			interrupts = <17 NRF_DEFAULT_IRQ_PRIORITY>;
231			status = "disabled";
232			clock-frequency = <32768>;
233			prescaler = <1>;
234		};
235
236		qdec: qdec0: qdec@40012000 {
237			compatible = "nordic,nrf-qdec";
238			reg = <0x40012000 0x1000>;
239			interrupts = <18 NRF_DEFAULT_IRQ_PRIORITY>;
240			status = "disabled";
241		};
242
243		egu0: swi0: egu@40014000 {
244			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
245			reg = <0x40014000 0x1000>;
246			interrupts = <20 NRF_DEFAULT_IRQ_PRIORITY>;
247			status = "okay";
248		};
249
250		egu1: swi1: egu@40015000 {
251			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
252			reg = <0x40015000 0x1000>;
253			interrupts = <21 NRF_DEFAULT_IRQ_PRIORITY>;
254			status = "okay";
255		};
256
257		swi2: swi@40016000 {
258			compatible = "nordic,nrf-swi";
259			reg = <0x40016000 0x1000>;
260			interrupts = <22 NRF_DEFAULT_IRQ_PRIORITY>;
261			status = "okay";
262		};
263
264		swi3: swi@40017000 {
265			compatible = "nordic,nrf-swi";
266			reg = <0x40017000 0x1000>;
267			interrupts = <23 NRF_DEFAULT_IRQ_PRIORITY>;
268			status = "okay";
269		};
270
271		swi4: swi@40018000 {
272			compatible = "nordic,nrf-swi";
273			reg = <0x40018000 0x1000>;
274			interrupts = <24 NRF_DEFAULT_IRQ_PRIORITY>;
275			status = "okay";
276		};
277
278		swi5: swi@40019000 {
279			compatible = "nordic,nrf-swi";
280			reg = <0x40019000 0x1000>;
281			interrupts = <25 NRF_DEFAULT_IRQ_PRIORITY>;
282			status = "okay";
283		};
284
285		flash_controller: flash-controller@4001e000 {
286			compatible = "nordic,nrf52-flash-controller";
287			reg = <0x4001e000 0x1000>;
288			partial-erase;
289
290			#address-cells = <1>;
291			#size-cells = <1>;
292
293
294			flash0: flash@0 {
295				compatible = "soc-nv-flash";
296				erase-block-size = <4096>;
297				write-block-size = <4>;
298			};
299		};
300
301		ppi: ppi@4001f000 {
302			compatible = "nordic,nrf-ppi";
303			reg = <0x4001f000 0x1000>;
304			status = "okay";
305		};
306
307		gpio0: gpio@50000000 {
308			compatible = "nordic,nrf-gpio";
309			gpio-controller;
310			reg = <0x50000000 0x1000>;
311			#gpio-cells = <2>;
312			status = "disabled";
313			port = <0>;
314		};
315	};
316};
317
318&nvic {
319	arm,num-irq-priority-bits = <3>;
320};
321