1/*
2 * Copyright (c) 2020 Linumiz
3 * Author: Parthiban Nallathambi <parthiban@linumiz.com>
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8#include <mem.h>
9#include <infineon/xmc4xxx.dtsi>
10
11/ {
12	psram1: memory@10000000 {
13		compatible = "mmio-sram";
14		reg = <0x10000000 DT_SIZE_K(64)>;
15	};
16
17	dsram1: memory@20000000 {
18		compatible = "mmio-sram";
19		reg = <0x20000000 DT_SIZE_K(64)>;
20	};
21
22	dsram2: memory@30000000 {
23		compatible = "mmio-sram";
24		reg = <0x30000000 DT_SIZE_K(32)>;
25	};
26};
27
28&flash0 {
29	reg = <0xc000000 DT_SIZE_M(1)>;
30	pages_layout: pages_layout {
31		pages_layout_16k: pages_layout_16k {
32			pages-count = <8>;
33			pages-size = <DT_SIZE_K(16)>;
34		};
35		pages_layout_128k: pages_layout_128k {
36			pages-count = <1>;
37			pages-size = <DT_SIZE_K(128)>;
38		};
39		pages_layout_256k: pages_layout_256k {
40			pages-count = <3>;
41			pages-size = <DT_SIZE_K(256)>;
42		};
43	};
44};
45
46&gpio0 {
47	ngpios = <13>;
48};
49
50&gpio1 {
51	ngpios = <16>;
52};
53
54&gpio2 {
55	ngpios = <13>;
56};
57
58&gpio14 {
59	ngpios = <16>;
60	gpio-reserved-ranges = <10 2>;
61};
62
63&gpio15 {
64	ngpios = <16>;
65	gpio-reserved-ranges = <0 2>, <10 2>;
66};
67
68&pinctrl {
69	gpio3: gpio@48028300 {
70		compatible = "infineon,xmc4xxx-gpio";
71		gpio-controller;
72		#gpio-cells = <2>;
73		reg = <0x48028300 0x100>;
74		ngpios = <7>;
75		status = "disabled";
76	};
77
78	gpio4: gpio@48028400 {
79		compatible = "infineon,xmc4xxx-gpio";
80		gpio-controller;
81		#gpio-cells = <2>;
82		reg = <0x48028400 0x100>;
83		ngpios = <2>;
84		status = "disabled";
85	};
86
87	gpio5: gpio@48028500 {
88		compatible = "infineon,xmc4xxx-gpio";
89		gpio-controller;
90		#gpio-cells = <2>;
91		reg = <0x48028500 0x100>;
92		ngpios = <4>;
93		status = "disabled";
94	};
95};
96