1/*
2 * Copyright (c) 2022 Schlumberger
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6#include <zephyr/dt-bindings/interrupt-controller/infineon-xmc4xxx-intc.h>
7
8&intc {
9	port-line-mapping = <
10	XMC4XXX_INTC_SET_LINE_MAP(0, 1, 0, 0)     /* ERU0_ETL0_INPUTA_P0_1   XMC_ERU_ETL_INPUT_A0 */
11	XMC4XXX_INTC_SET_LINE_MAP(2, 5, 2, 0)     /* ERU0_ETL0_INPUTA_P2_5   XMC_ERU_ETL_INPUT_A2 */
12	XMC4XXX_INTC_SET_LINE_MAP(3, 2, 1, 0)     /* ERU0_ETL0_INPUTA_P3_2   XMC_ERU_ETL_INPUT_A1 */
13	XMC4XXX_INTC_SET_LINE_MAP(0, 0, 4, 0)     /* ERU0_ETL0_INPUTB_P0_0   XMC_ERU_ETL_INPUT_B0 */
14	XMC4XXX_INTC_SET_LINE_MAP(2, 0, 7, 0)     /* ERU0_ETL0_INPUTB_P2_0   XMC_ERU_ETL_INPUT_B3 */
15	XMC4XXX_INTC_SET_LINE_MAP(2, 4, 6, 0)     /* ERU0_ETL0_INPUTB_P2_4   XMC_ERU_ETL_INPUT_B2 */
16	XMC4XXX_INTC_SET_LINE_MAP(3, 1, 5, 0)     /* ERU0_ETL0_INPUTB_P3_1   XMC_ERU_ETL_INPUT_B1 */
17	XMC4XXX_INTC_SET_LINE_MAP(0, 10, 0, 1)    /* ERU0_ETL1_INPUTA_P0_10  XMC_ERU_ETL_INPUT_A0 */
18	XMC4XXX_INTC_SET_LINE_MAP(2, 3, 2, 1)     /* ERU0_ETL1_INPUTA_P2_3   XMC_ERU_ETL_INPUT_A2 */
19	XMC4XXX_INTC_SET_LINE_MAP(0, 9, 4, 1)     /* ERU0_ETL1_INPUTB_P0_9   XMC_ERU_ETL_INPUT_B0 */
20	XMC4XXX_INTC_SET_LINE_MAP(2, 2, 6, 1)     /* ERU0_ETL1_INPUTB_P2_2   XMC_ERU_ETL_INPUT_B2 */
21	XMC4XXX_INTC_SET_LINE_MAP(2, 6, 7, 1)     /* ERU0_ETL1_INPUTB_P2_6   XMC_ERU_ETL_INPUT_B3 */
22	XMC4XXX_INTC_SET_LINE_MAP(0, 8, 1, 2)     /* ERU0_ETL2_INPUTA_P0_8   XMC_ERU_ETL_INPUT_A1 */
23	XMC4XXX_INTC_SET_LINE_MAP(1, 5, 0, 2)     /* ERU0_ETL2_INPUTA_P1_5   XMC_ERU_ETL_INPUT_A0 */
24	XMC4XXX_INTC_SET_LINE_MAP(0, 12, 6, 2)    /* ERU0_ETL2_INPUTB_P0_12  XMC_ERU_ETL_INPUT_B2 */
25	XMC4XXX_INTC_SET_LINE_MAP(0, 4, 7, 2)     /* ERU0_ETL2_INPUTB_P0_4   XMC_ERU_ETL_INPUT_B3 */
26	XMC4XXX_INTC_SET_LINE_MAP(0, 7, 5, 2)     /* ERU0_ETL2_INPUTB_P0_7   XMC_ERU_ETL_INPUT_B1 */
27	XMC4XXX_INTC_SET_LINE_MAP(1, 4, 4, 2)     /* ERU0_ETL2_INPUTB_P1_4   XMC_ERU_ETL_INPUT_B0 */
28	XMC4XXX_INTC_SET_LINE_MAP(0, 11, 2, 3)    /* ERU0_ETL3_INPUTA_P0_11  XMC_ERU_ETL_INPUT_A2 */
29	XMC4XXX_INTC_SET_LINE_MAP(1, 1, 0, 3)     /* ERU0_ETL3_INPUTA_P1_1   XMC_ERU_ETL_INPUT_A0 */
30	XMC4XXX_INTC_SET_LINE_MAP(3, 6, 1, 3)     /* ERU0_ETL3_INPUTA_P3_6   XMC_ERU_ETL_INPUT_A1 */
31	XMC4XXX_INTC_SET_LINE_MAP(0, 2, 7, 3)     /* ERU0_ETL3_INPUTB_P0_2   XMC_ERU_ETL_INPUT_B3 */
32	XMC4XXX_INTC_SET_LINE_MAP(0, 6, 6, 3)     /* ERU0_ETL3_INPUTB_P0_6   XMC_ERU_ETL_INPUT_B2 */
33	XMC4XXX_INTC_SET_LINE_MAP(1, 0, 4, 3)     /* ERU0_ETL3_INPUTB_P1_0   XMC_ERU_ETL_INPUT_B0 */
34	XMC4XXX_INTC_SET_LINE_MAP(3, 5, 5, 3)     /* ERU0_ETL3_INPUTB_P3_5   XMC_ERU_ETL_INPUT_B1 */
35	XMC4XXX_INTC_SET_LINE_MAP(1, 5, 0, 4)     /* ERU1_ETL0_INPUTA_P1_5   XMC_ERU_ETL_INPUT_A0 */
36	XMC4XXX_INTC_SET_LINE_MAP(2, 1, 4, 4)     /* ERU1_ETL0_INPUTB_P2_1   XMC_ERU_ETL_INPUT_B0 */
37	XMC4XXX_INTC_SET_LINE_MAP(1, 15, 0, 5)    /* ERU1_ETL1_INPUTA_P1_15  XMC_ERU_ETL_INPUT_A0 */
38	XMC4XXX_INTC_SET_LINE_MAP(2, 7, 4, 5)     /* ERU1_ETL1_INPUTB_P2_7   XMC_ERU_ETL_INPUT_B0 */
39	XMC4XXX_INTC_SET_LINE_MAP(1, 3, 0, 6)     /* ERU1_ETL2_INPUTA_P1_3   XMC_ERU_ETL_INPUT_A0 */
40	XMC4XXX_INTC_SET_LINE_MAP(1, 2, 4, 6)     /* ERU1_ETL2_INPUTB_P1_2   XMC_ERU_ETL_INPUT_B0 */
41	XMC4XXX_INTC_SET_LINE_MAP(0, 5, 0, 7)     /* ERU1_ETL3_INPUTA_P0_5   XMC_ERU_ETL_INPUT_A0 */
42	XMC4XXX_INTC_SET_LINE_MAP(0, 3, 4, 7)     /* ERU1_ETL3_INPUTB_P0_3   XMC_ERU_ETL_INPUT_B0 */
43	>;
44};
45