1/*
2 * Copyright (c) 2022 Kamil Serwus
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <atmel/samc2x.dtsi>
8
9/ {
10	aliases {
11		sercom-4 = &sercom4;
12		sercom-5 = &sercom5;
13	};
14
15	soc {
16		adc1: adc@42004800 {
17			compatible = "atmel,sam0-adc";
18			status = "disabled";
19			reg = <0x42004800 0x30>;
20			interrupts = <26 0>;
21			interrupt-names = "resrdy";
22			clocks = <&gclk 34>, <&mclk 0x1c 18>;
23			clock-names = "GCLK", "MCLK";
24			gclk = <0>;
25			prescaler = <4>;
26			#io-channel-cells = <1>;
27		};
28
29		sercom4: sercom@42001400 {
30			compatible = "atmel,sam0-sercom";
31			reg = <0x42001400 0x40>;
32			interrupts = <13 0>;
33			clocks = <&gclk 23>, <&mclk 0x1c 5>;
34			clock-names = "GCLK", "MCLK";
35			status = "disabled";
36		};
37
38		sercom5: sercom@42001800 {
39			compatible = "atmel,sam0-sercom";
40			reg = <0x42001800 0x40>;
41			interrupts = <14 0>;
42			clocks = <&gclk 25>, <&mclk 0x1c 6>;
43			clock-names = "GCLK", "MCLK";
44			status = "disabled";
45		};
46
47		can0: can@42001c00 {
48			compatible = "atmel,sam0-can";
49			reg = <0x42001c00 0x100>;
50			interrupts = <15 0>;
51			interrupt-names = "LINE_0";
52			clocks = <&gclk 26>, <&mclk 0x10 8>;
53			clock-names = "GCLK", "MCLK";
54			bosch,mram-cfg = <0x0 28 8 3 3 0 1 1>;
55			divider = <12>;
56			sample-point = <875>;
57			sample-point-data = <875>;
58			status = "disabled";
59		};
60
61		can1: can@42002000 {
62			compatible = "atmel,sam0-can";
63			reg = <0x42002000 0x100>;
64			interrupts = <16 0>;
65			interrupt-names = "LINE_0";
66			clocks = <&gclk 27>, <&mclk 0x10 9>;
67			clock-names = "GCLK", "MCLK";
68			bosch,mram-cfg = <0x0 28 8 3 3 0 1 1>;
69			divider = <12>;
70			sample-point = <875>;
71			sample-point-data = <875>;
72			status = "disabled";
73		};
74	};
75};
76