1# SPDX-License-Identifier: Apache-2.0
2
3menuconfig UART_NS16550
4	bool "NS16550 serial driver"
5	default y
6	depends on DT_HAS_NS16550_ENABLED
7	select SERIAL_HAS_DRIVER
8	select SERIAL_SUPPORT_INTERRUPT
9	help
10	  This option enables the NS16550 serial driver.
11	  This driver can be used for the serial hardware
12	  available on x86 boards.
13
14if UART_NS16550
15
16config UART_NS16550_LINE_CTRL
17	bool "Serial Line Control for Apps"
18	depends on UART_LINE_CTRL
19	help
20	  This enables the API for apps to control the serial line,
21	  such as CTS and RTS.
22
23	  Says n if not sure.
24
25config UART_NS16550_DRV_CMD
26	bool "Driver Commands"
27	depends on UART_DRV_CMD
28	help
29	  This enables the API for apps to send commands to driver.
30
31	  Says n if not sure.
32
33choice UART_NS16550_VARIANT
34	prompt "UART variant"
35	default UART_NS16550_VARIANT_NS16550
36	help
37	  Select UART device variant
38
39config UART_NS16550_VARIANT_NS16550
40	bool "UART 16550 (16-bytes FIFO)"
41	help
42	  This enables support for 16-bytes FIFO if UART controller is 16550.
43
44config UART_NS16550_VARIANT_NS16750
45	bool "UART 16750 (64-bytes FIFO and auto flow control)"
46	help
47	  This enables support for 64-bytes FIFO and automatic hardware
48	  flow control if UART controller is 16750.
49
50config UART_NS16550_VARIANT_NS16950
51	bool "UART 16950 (128-bytes FIFO and auto flow control)"
52	help
53	  This enables support for 128-bytes FIFO and automatic hardware flow control.
54endchoice
55
56config UART_NS16550_ACCESS_WORD_ONLY
57	bool "NS16550 only allows word access"
58	help
59	  In some case, e.g. ARC HS Development kit, the peripheral space of ns
60	  16550 (DesignWare UART) only allows word access, byte access will raise
61	  exception.
62
63config UART_NS16550_PARENT_INIT_LEVEL
64	bool "Boot level based on parent node"
65	default y if ACPI
66	help
67	  Boot level based on parent node (PCI or no PCI device). Some platforms the
68	  PCI bus driver depends on ACPI sub system to retrieve platform information
69	  such as interrupt routing information. But ACPI sub system currently support
70	  only post kernel and hence such platforms the UART driver instance init
71	  should be invoked only post kernel in case parent node is PCI.
72
73config UART_NS16550_TI_K3
74	bool "Add support for NS16550 variant specific to TI K3 SoCs"
75	help
76	  Enabling this configuration allows the users to use the UART port in
77	  Texas Instruments K3 SoCs by enabling a vendor specific extended register
78	  set.
79
80menu "NS16550 Workarounds"
81
82config UART_NS16550_WA_ISR_REENABLE_INTERRUPT
83	bool "Re-enable interrupts by toggling IER at end of ISR"
84	depends on UART_INTERRUPT_DRIVEN
85	help
86	  In some configurations (e.g. edge interrupt triggers),
87	  an interruptible event occurs during ISR and the host interrupt
88	  controller does not see the new event due to IIR is constantly
89	  asserting interrupts. For example, the callback handles RX and
90	  then TX. If another character comes in before end of TX processing
91	  (TX interrupt still asserts while raising RX interrupt), the host
92	  interrupt controller may not see this new event. So if needed,
93	  the IER is being toggled to re-assert interrupts at the end of ISR
94	  to nudge the host interrupt controller to fire the ISR again.
95
96endmenu
97
98endif # UART_NS16550
99