1 /*
2  * Copyright (c) 2022, Renesas Electronics Corporation
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #include <zephyr/drivers/pinctrl.h>
8 #include <DA1469xAB.h>
9 
10 /** Utility macro to retrieve starting mode register and pin count for GPIO port from DT */
11 #define GPIO_PORT_ENTRY(nodelabel)							\
12 		{ DT_REG_ADDR_BY_IDX(DT_NODELABEL(nodelabel), 1),			\
13 		  DT_PROP(DT_NODELABEL(nodelabel), ngpios) }
14 
15 struct gpio_port {
16 	uint32_t p0_mode_addr;
17 	uint8_t pin_count;
18 };
19 
20 static const struct gpio_port smartbond_gpio_ports[] = {
21 	GPIO_PORT_ENTRY(gpio0),
22 	GPIO_PORT_ENTRY(gpio1),
23 };
24 
pinctrl_configure_pin(const pinctrl_soc_pin_t * pin)25 static void pinctrl_configure_pin(const pinctrl_soc_pin_t *pin)
26 {
27 	volatile uint32_t *reg;
28 	uint32_t reg_val;
29 
30 	__ASSERT_NO_MSG(pin->port < ARRAY_SIZE(smartbond_gpio_ports));
31 	__ASSERT_NO_MSG(pin->pin < smartbond_gpio_ports[pin->port].pin_count);
32 
33 	reg = (volatile uint32_t *)smartbond_gpio_ports[pin->port].p0_mode_addr;
34 	reg += pin->pin;
35 
36 	reg_val = pin->func << GPIO_P0_00_MODE_REG_PID_Pos;
37 	if (pin->bias_pull_up) {
38 		reg_val |= 0x01 << GPIO_P0_00_MODE_REG_PUPD_Pos;
39 	} else if (pin->bias_pull_down) {
40 		reg_val |= 0x02 << GPIO_P0_00_MODE_REG_PUPD_Pos;
41 	} else if (pin->output_enable) {
42 		reg_val |= 0x03 << GPIO_P0_00_MODE_REG_PUPD_Pos;
43 	}
44 
45 	*reg = reg_val;
46 }
47 
pinctrl_configure_pins(const pinctrl_soc_pin_t * pins,uint8_t pin_cnt,uintptr_t reg)48 int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
49 			   uintptr_t reg)
50 {
51 	ARG_UNUSED(reg);
52 
53 	for (uint8_t i = 0U; i < pin_cnt; i++) {
54 		pinctrl_configure_pin(pins++);
55 	}
56 
57 	return 0;
58 }
59