1 /*
2 * Copyright 2022-2023 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <zephyr/kernel.h>
8 #include <zephyr/drivers/mdio.h>
9 #include <zephyr/drivers/pinctrl.h>
10 #include <zephyr/logging/log.h>
11 LOG_MODULE_REGISTER(nxp_s32_emdio, CONFIG_MDIO_LOG_LEVEL);
12
13 #include <Netc_EthSwt_Ip.h>
14
15 #define MDIO_NODE DT_NODELABEL(emdio)
16 #define NETC_SWT_IDX 0
17
18 struct nxp_s32_mdio_config {
19 const struct pinctrl_dev_config *pincfg;
20 };
21
22 struct nxp_s32_mdio_data {
23 struct k_mutex rw_mutex;
24 };
25
nxp_s32_mdio_read(const struct device * dev,uint8_t prtad,uint8_t regad,uint16_t * regval)26 static int nxp_s32_mdio_read(const struct device *dev, uint8_t prtad,
27 uint8_t regad, uint16_t *regval)
28 {
29 struct nxp_s32_mdio_data *data = dev->data;
30 Std_ReturnType status;
31
32 k_mutex_lock(&data->rw_mutex, K_FOREVER);
33 status = Netc_EthSwt_Ip_ReadTrcvRegister(NETC_SWT_IDX, prtad, regad, regval);
34 k_mutex_unlock(&data->rw_mutex);
35
36 return status == E_OK ? 0 : -EIO;
37 }
38
nxp_s32_mdio_write(const struct device * dev,uint8_t prtad,uint8_t regad,uint16_t regval)39 static int nxp_s32_mdio_write(const struct device *dev, uint8_t prtad,
40 uint8_t regad, uint16_t regval)
41 {
42 struct nxp_s32_mdio_data *data = dev->data;
43 Std_ReturnType status;
44
45 k_mutex_lock(&data->rw_mutex, K_FOREVER);
46 status = Netc_EthSwt_Ip_WriteTrcvRegister(NETC_SWT_IDX, prtad, regad, regval);
47 k_mutex_unlock(&data->rw_mutex);
48
49 return status == E_OK ? 0 : -EIO;
50 }
51
nxp_s32_mdio_initialize(const struct device * dev)52 static int nxp_s32_mdio_initialize(const struct device *dev)
53 {
54 struct nxp_s32_mdio_data *data = dev->data;
55 const struct nxp_s32_mdio_config *cfg = dev->config;
56 int err;
57
58 err = pinctrl_apply_state(cfg->pincfg, PINCTRL_STATE_DEFAULT);
59 if (err != 0) {
60 return err;
61 }
62
63 k_mutex_init(&data->rw_mutex);
64
65 return 0;
66 }
67
nxp_s32_mdio_noop(const struct device * dev)68 static void nxp_s32_mdio_noop(const struct device *dev)
69 {
70 /* intentionally left empty */
71 }
72
73 static const struct mdio_driver_api nxp_s32_mdio_api = {
74 .read = nxp_s32_mdio_read,
75 .write = nxp_s32_mdio_write,
76 /* NETC does not support enabling/disabling EMDIO controller independently */
77 .bus_enable = nxp_s32_mdio_noop,
78 .bus_disable = nxp_s32_mdio_noop,
79 };
80
81 PINCTRL_DT_DEFINE(MDIO_NODE);
82
83 static struct nxp_s32_mdio_data nxp_s32_mdio0_data;
84
85 static const struct nxp_s32_mdio_config nxp_s32_mdio0_cfg = {
86 .pincfg = PINCTRL_DT_DEV_CONFIG_GET(MDIO_NODE),
87 };
88
89 DEVICE_DT_DEFINE(MDIO_NODE,
90 &nxp_s32_mdio_initialize,
91 NULL,
92 &nxp_s32_mdio0_data,
93 &nxp_s32_mdio0_cfg,
94 POST_KERNEL,
95 CONFIG_MDIO_INIT_PRIORITY,
96 &nxp_s32_mdio_api);
97
