1 /*
2  * Copyright (c) 2021, NXP
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #define DT_DRV_COMPAT nxp_imx_ccm_rev2
8 #include <errno.h>
9 #include <soc.h>
10 #include <zephyr/drivers/clock_control.h>
11 #include <zephyr/dt-bindings/clock/imx_ccm_rev2.h>
12 #include <fsl_clock.h>
13 
14 #define LOG_LEVEL CONFIG_CLOCK_CONTROL_LOG_LEVEL
15 #include <zephyr/logging/log.h>
16 LOG_MODULE_REGISTER(clock_control);
17 
mcux_ccm_on(const struct device * dev,clock_control_subsys_t sub_system)18 static int mcux_ccm_on(const struct device *dev,
19 				  clock_control_subsys_t sub_system)
20 {
21 	return 0;
22 }
23 
mcux_ccm_off(const struct device * dev,clock_control_subsys_t sub_system)24 static int mcux_ccm_off(const struct device *dev,
25 				   clock_control_subsys_t sub_system)
26 {
27 	return 0;
28 }
29 
mcux_ccm_get_subsys_rate(const struct device * dev,clock_control_subsys_t sub_system,uint32_t * rate)30 static int mcux_ccm_get_subsys_rate(const struct device *dev,
31 					clock_control_subsys_t sub_system,
32 					uint32_t *rate)
33 {
34 	uint32_t clock_name = (uint32_t) sub_system;
35 	uint32_t clock_root, peripheral, instance;
36 
37 	peripheral = (clock_name & IMX_CCM_PERIPHERAL_MASK);
38 	instance = (clock_name & IMX_CCM_INSTANCE_MASK);
39 	switch (peripheral) {
40 #ifdef CONFIG_I2C_MCUX_LPI2C
41 	case IMX_CCM_LPI2C1_CLK:
42 		clock_root = kCLOCK_Root_Lpi2c1 + instance;
43 		break;
44 #endif
45 
46 #ifdef CONFIG_SPI_MCUX_LPSPI
47 	case IMX_CCM_LPSPI1_CLK:
48 		clock_root = kCLOCK_Root_Lpspi1 + instance;
49 		break;
50 #endif
51 
52 #ifdef CONFIG_UART_MCUX_LPUART
53 	case IMX_CCM_LPUART1_CLK:
54 		clock_root = kCLOCK_Root_Lpuart1 + instance;
55 		break;
56 #endif
57 
58 #if CONFIG_IMX_USDHC
59 	case IMX_CCM_USDHC1_CLK:
60 	case IMX_CCM_USDHC2_CLK:
61 		clock_root = kCLOCK_Root_Usdhc1 + instance;
62 		break;
63 #endif
64 
65 #ifdef CONFIG_DMA_MCUX_EDMA
66 	case IMX_CCM_EDMA_CLK:
67 		clock_root = kCLOCK_Root_Bus;
68 		break;
69 	case IMX_CCM_EDMA_LPSR_CLK:
70 		clock_root = kCLOCK_Root_Bus_Lpsr;
71 		break;
72 #endif
73 
74 #ifdef CONFIG_PWM_MCUX
75 	case IMX_CCM_PWM_CLK:
76 		clock_root = kCLOCK_Root_Bus;
77 		break;
78 #endif
79 
80 #ifdef CONFIG_CAN_MCUX_FLEXCAN
81 	case IMX_CCM_CAN1_CLK:
82 		clock_root = kCLOCK_Root_Can1 + instance;
83 		break;
84 #endif
85 
86 #ifdef CONFIG_COUNTER_MCUX_GPT
87 	case IMX_CCM_GPT_CLK:
88 		clock_root = kCLOCK_Root_Gpt1 + instance;
89 		break;
90 #endif
91 
92 #ifdef CONFIG_I2S_MCUX_SAI
93 	case IMX_CCM_SAI1_CLK:
94 		clock_root =  kCLOCK_Root_Sai1;
95 		break;
96 	case IMX_CCM_SAI2_CLK:
97 		clock_root =  kCLOCK_Root_Sai2;
98 		break;
99 	case IMX_CCM_SAI3_CLK:
100 		clock_root =  kCLOCK_Root_Sai3;
101 		break;
102 	case IMX_CCM_SAI4_CLK:
103 		clock_root =  kCLOCK_Root_Sai4;
104 		break;
105 #endif
106 	default:
107 		return -EINVAL;
108 	}
109 
110 	*rate = CLOCK_GetRootClockFreq(clock_root);
111 	return 0;
112 }
113 
114 static const struct clock_control_driver_api mcux_ccm_driver_api = {
115 	.on = mcux_ccm_on,
116 	.off = mcux_ccm_off,
117 	.get_rate = mcux_ccm_get_subsys_rate,
118 };
119 
120 DEVICE_DT_INST_DEFINE(0, NULL, NULL, NULL, NULL, PRE_KERNEL_1,
121 		      CONFIG_CLOCK_CONTROL_INIT_PRIORITY,
122 		      &mcux_ccm_driver_api);
123