1/*
2 * Copyright 2023 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8
9#include <nxp/nxp_mimx93_a55.dtsi>
10#include "mimx93_evk-pinctrl.dtsi"
11
12/ {
13	model = "NXP i.MX93 A55";
14	compatible = "fsl,mimx93";
15
16	chosen {
17		zephyr,console = &lpuart2;
18		zephyr,shell-uart = &lpuart2;
19		zephyr,sram = &sram0;
20	};
21
22	cpus {
23		cpu@0 {
24			status = "disabled";
25		};
26	};
27
28	/* Inmate memory, reserved through "mem=1248MB" boot argument,
29	 * starts at 0xce000000.
30	 */
31	sram0: memory@ce000000 {
32		reg = <0xce000000 DT_SIZE_M(1)>;
33	};
34
35	/* TODO: all of the nodes below are needed by SOF and should
36	 * be removed once all drivers used by SOF have been moved
37	 * to Zephyr.
38	 *
39	 * They are added in the DTS for the sake of not using hardcoded
40	 * values in mmu_regions.c
41	 */
42	mu2_a: memory@42430000 {
43		reg = <0x42430000 DT_SIZE_K(64)>;
44	};
45
46	sai3: memory@42660000 {
47		reg = <0x42660000 DT_SIZE_K(64)>;
48	};
49
50	edma2_ch0: memory@42010000 {
51		reg = <0x42010000 DT_SIZE_K(32)>;
52	};
53
54	edma2_ch1: memory@42018000 {
55		reg = <0x42018000 DT_SIZE_K(32)>;
56	};
57
58	outbox: memory@ce100000 {
59		reg = <0xce100000 DT_SIZE_K(4)>;
60	};
61
62	inbox: memory@ce101000 {
63		reg = <0xce101000 DT_SIZE_K(4)>;
64	};
65
66	stream: memory@ce102000 {
67		reg = <0xce102000 DT_SIZE_K(4)>;
68	};
69
70	/* TODO: this is extremely bad and it's needed here because of
71	 * the fact that the DMA buffer shared by host and FW is situated
72	 * in this region. For now, it's easier to create a mapping for the
73	 * whole region but in the future a mapping should only be created
74	 * for the physical address of the buffer sent to the FW through an
75	 * IPC.
76	 */
77	host_ram: memory@80000000 {
78		reg = <0x80000000 DT_SIZE_M(1024)>;
79	};
80};
81
82&lpuart2 {
83	status = "okay";
84	current-speed = <115200>;
85	/* clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>; */
86	pinctrl-0 = <&uart2_default>;
87	pinctrl-names = "default";
88};
89