1/* 2 * SPDX-License-Identifier: Apache-2.0 3 * 4 * Copyright (c) 2020 Linumiz 5 * Author: Parthiban Nallathambi <parthiban@linumiz.com> 6 * 7 */ 8 9/dts-v1/; 10 11#include <infineon/xmc4500_F100x1024.dtsi> 12#include <infineon/xmc4500_F100x1024-intc.dtsi> 13#include <zephyr/dt-bindings/pwm/pwm.h> 14#include "xmc45_relax_kit-pinctrl.dtsi" 15 16/ { 17 model = "Infineon XMC4500 Relax Kit"; 18 compatible = "infineon,xm4500-relax-kit", "infineon,xmc4500", 19 "infineon,xmc4xxx"; 20 21 aliases { 22 led0 = &led1; 23 die-temp0 = &die_temp; 24 pwm-led0 = &pwm_led1; 25 }; 26 27 leds { 28 compatible = "gpio-leds"; 29 /* leds are labelled LED1 and LED2 in the relax kit documentation */ 30 led1: led1 { 31 gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; 32 }; 33 led2: led2 { 34 gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; 35 }; 36 }; 37 38 pwmleds { 39 compatible = "pwm-leds"; 40 pwm_led1: pwm_led1 { 41 pwms = <&pwm_ccu40 2 PWM_SEC(1) PWM_POLARITY_NORMAL>; 42 label = "PWM LED1"; 43 }; 44 pwm_led2: pwm_led2 { 45 pwms = <&pwm_ccu40 3 PWM_SEC(1) PWM_POLARITY_NORMAL>; 46 label = "PWM LED2"; 47 }; 48 }; 49 50 chosen { 51 zephyr,sram = &dsram1; 52 zephyr,flash = &flash0; 53 zephyr,console = &usic1ch1; 54 zephyr,shell-uart = &usic1ch1; 55 zephyr,flash-controller = &flash_controller; 56 zephyr,code-partition = &code_partition; 57 }; 58}; 59 60&psram1 { 61 compatible = "zephyr,memory-region", "mmio-sram"; 62 zephyr,memory-region = "PSRAM1"; 63}; 64 65&dsram2 { 66 compatible = "zephyr,memory-region", "mmio-sram"; 67 zephyr,memory-region = "DSRAM2"; 68}; 69 70&flash_controller { 71 status = "okay"; 72}; 73 74&flash0 { 75 partitions { 76 compatible = "fixed-partitions"; 77 #address-cells = <1>; 78 #size-cells = <1>; 79 80 code_partition: partition@0 { 81 reg = <0x0 0x80000>; 82 read-only; 83 }; 84 85 storage_partition: partition@80000 { 86 label = "storage"; 87 reg = <0x80000 0x80000>; 88 }; 89 }; 90}; 91 92&cpu0 { 93 clock-frequency = <120000000>; 94}; 95 96&usic1ch1 { 97 compatible = "infineon,xmc4xxx-uart"; 98 current-speed = <115200>; 99 pinctrl-0 = <&uart_tx_p0_1_u1c1 &uart_rx_p0_0_u1c1>; 100 pinctrl-names = "default"; 101 input-src = "DX0D"; 102 interrupts = <90 1 91 1>; 103 interrupt-names = "tx", "rx"; 104 fifo-start-offset = <0>; 105 fifo-tx-size = <16>; 106 fifo-rx-size = <16>; 107 status = "okay"; 108}; 109 110&adc0 { 111 vref-internal-mv = <3300>; 112}; 113 114&adc1 { 115 vref-internal-mv = <3300>; 116}; 117 118&adc2 { 119 vref-internal-mv = <3300>; 120}; 121 122&adc3 { 123 vref-internal-mv = <3300>; 124}; 125 126&gpio1 { 127 status = "okay"; 128}; 129 130&pwm_ccu40 { 131 slice-prescaler = <15 15 15 15>; 132 pinctrl-0 = <&pwm_out_p1_0_ccu40_ch3 &pwm_out_p1_1_ccu40_ch2>; 133 pinctrl-names = "default"; 134}; 135