1 /* 2 * Copyright (c) 2016 Linaro Limited 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #include <zephyr/device.h> 8 #include <zephyr/init.h> 9 #include <zephyr/kernel.h> 10 #include <soc.h> 11 #include <zephyr/sys/sys_io.h> 12 #include <zephyr/drivers/gpio/gpio_cmsdk_ahb.h> 13 14 /** 15 * @brief Pinmux driver for ARM V2M Beetle Board 16 * 17 * The ARM V2M Beetle Board has 4 GPIO controllers. These controllers 18 * are responsible for pin muxing, input/output, pull-up, etc. 19 * 20 * The GPIO controllers 2 and 3 are reserved and therefore not exposed by 21 * this driver. 22 * 23 * All GPIO controller exposed pins are exposed via the following sequence of 24 * pin numbers: 25 * Pins 0 - 15 are for GPIO0 26 * Pins 16 - 31 are for GPIO1 27 * 28 * For the exposed GPIO controllers ARM V2M Beetle Board follows the Arduino 29 * compliant pin out. 30 */ 31 32 #define CMSDK_AHB_GPIO0_DEV \ 33 ((volatile struct gpio_cmsdk_ahb *)DT_REG_ADDR(DT_NODELABEL(gpio0))) 34 #define CMSDK_AHB_GPIO1_DEV \ 35 ((volatile struct gpio_cmsdk_ahb *)DT_REG_ADDR(DT_NODELABEL(gpio1))) 36 37 /* 38 * This is the mapping from the ARM V2M Beetle Board pins to GPIO 39 * controllers. 40 * 41 * D0 : P0_0 42 * D1 : P0_1 43 * D2 : P0_2 44 * D3 : P0_3 45 * D4 : P0_4 46 * D5 : P0_5 47 * D6 : P0_6 48 * D7 : P0_7 49 * D8 : P0_8 50 * D9 : P0_9 51 * D10 : P0_10 52 * D11 : P0_11 53 * D12 : P0_12 54 * D13 : P0_13 55 * D14 : P0_14 56 * D15 : P0_15 57 * D16 : P1_0 58 * D17 : P1_1 59 * D18 : P1_2 60 * D19 : P1_3 61 * D20 : P1_4 62 * D21 : P1_5 63 * D22 : P1_6 64 * D23 : P1_7 65 * D24 : P1_8 66 * D25 : P1_9 67 * D26 : P1_10 68 * D27 : P1_11 69 * D28 : P1_12 70 * D29 : P1_13 71 * D30 : P1_14 72 * D31 : P1_15 73 * 74 * UART_0_RX : D0 75 * UART_0_TX : D1 76 * SPI_0_CS : D10 77 * SPI_0_MOSI : D11 78 * SPI_0_MISO : D12 79 * SPI_0_SCLK : D13 80 * I2C_0_SCL : D14 81 * I2C_0_SDA : D15 82 * UART_1_RX : D16 83 * UART_1_TX : D17 84 * SPI_1_CS : D18 85 * SPI_1_MOSI : D19 86 * SPI_1_MISO : D20 87 * SPI_1_SCK : D21 88 * I2C_1_SDA : D22 89 * I2C_1_SCL : D23 90 * 91 */ arm_v2m_beetle_pinmux_defaults(void)92static void arm_v2m_beetle_pinmux_defaults(void) 93 { 94 uint32_t gpio_0 = 0U; 95 uint32_t gpio_1 = 0U; 96 97 /* Set GPIO Alternate Functions */ 98 99 gpio_0 = (1<<0); /* Shield 0 UART 0 RXD */ 100 gpio_0 |= (1<<1); /* Shield 0 UART 0 TXD */ 101 gpio_0 |= (1<<14); /* Shield 0 I2C SDA SBCON2 */ 102 gpio_0 |= (1<<15); /* Shield 0 I2C SCL SBCON2 */ 103 gpio_0 |= (1<<10); /* Shield 0 SPI_3 nCS */ 104 gpio_0 |= (1<<11); /* Shield 0 SPI_3 MOSI */ 105 gpio_0 |= (1<<12); /* Shield 0 SPI_3 MISO */ 106 gpio_0 |= (1<<13); /* Shield 0 SPI_3 SCK */ 107 108 CMSDK_AHB_GPIO0_DEV->altfuncset = gpio_0; 109 110 gpio_1 = (1<<0); /* UART 1 RXD */ 111 gpio_1 |= (1<<1); /* UART 1 TXD */ 112 gpio_1 |= (1<<6); /* Shield 1 I2C SDA */ 113 gpio_1 |= (1<<7); /* Shield 1 I2C SCL */ 114 gpio_1 |= (1<<2); /* ADC SPI_1 nCS */ 115 gpio_1 |= (1<<3); /* ADC SPI_1 MOSI */ 116 gpio_1 |= (1<<4); /* ADC SPI_1 MISO */ 117 gpio_1 |= (1<<5); /* ADC SPI_1 SCK */ 118 119 gpio_1 |= (1<<8); /* QSPI CS 2 */ 120 gpio_1 |= (1<<9); /* QSPI CS 1 */ 121 gpio_1 |= (1<<10); /* QSPI IO 0 */ 122 gpio_1 |= (1<<11); /* QSPI IO 1 */ 123 gpio_1 |= (1<<12); /* QSPI IO 2 */ 124 gpio_1 |= (1<<13); /* QSPI IO 3 */ 125 gpio_1 |= (1<<14); /* QSPI SCK */ 126 127 CMSDK_AHB_GPIO1_DEV->altfuncset = gpio_1; 128 129 /* Set the ARD_PWR_EN GPIO1[15] as an output */ 130 CMSDK_AHB_GPIO1_DEV->outenableset |= (0x1 << 15); 131 /* Set on 3v3 (for ARDUINO HDR compliance) */ 132 CMSDK_AHB_GPIO1_DEV->data |= (0x1 << 15); 133 } 134 arm_v2m_beetle_pinmux_init(void)135static int arm_v2m_beetle_pinmux_init(void) 136 { 137 138 arm_v2m_beetle_pinmux_defaults(); 139 140 return 0; 141 } 142 143 SYS_INIT(arm_v2m_beetle_pinmux_init, PRE_KERNEL_1, 144 CONFIG_KERNEL_INIT_PRIORITY_DEFAULT); 145
