1.. _stm32h747i_disco_board:
2
3ST STM32H747I Discovery
4#######################
5
6Overview
7********
8
9The discovery kit enables a wide diversity of applications taking benefit
10from audio, multi-sensor support, graphics, security, video,
11and high-speed connectivity features.
12
13The board includes an STM32H747XI SoC with a high-performance DSP, Arm Cortex-M7 + Cortex-M4 MCU,
14with 2MBytes of Flash memory, 1MB RAM, 480 MHz CPU, Art Accelerator, L1 cache, external memory interface,
15large set of peripherals, SMPS, and MIPI-DSI.
16
17Additionally, the board features:
18
19- On-board ST-LINK/V3E supporting USB reenumeration capability
20- USB ST-LINK functions: virtual COM port, mass storage, debug port
21- Flexible power-supply options:
22
23  - ST-LINK USB VBUS, USB OTG HS connector, or external sources
24
25- 4” capacitive touch LCD display module with MIPI® DSI interface
26- Ethernet compliant with IEEE802.3-2002
27- USB OTG HS
28- Stereo speaker outputs
29- ST-MEMS digital microphones
30- 2 x 512-Mbit QUAD-SPI NOR Flash memory
31- 256-Mbit SDRAM
32- 4 color user LEDs
33- 1 user and reset push-button
34- 4-direction joystick with selection button
35- Arduino Uno V3 connectors
36
37.. image:: img/stm32h747i_disco.jpg
38     :align: center
39     :alt: STM32H747I-DISCO
40
41More information about the board can be found at the `STM32H747I-DISCO website`_.
42More information about STM32H747XIH6 can be found here:
43
44- `STM32H747XI on www.st.com`_
45- `STM32H747xx reference manual`_
46- `STM32H747xx datasheet`_
47
48Supported Features
49==================
50
51The current Zephyr stm32h747i_disco board configuration supports the following hardware features:
52
53+-----------+------------+-------------------------------------+
54| Interface | Controller | Driver/Component                    |
55+===========+============+=====================================+
56| NVIC      | on-chip    | nested vector interrupt controller  |
57+-----------+------------+-------------------------------------+
58| UART      | on-chip    | serial port-polling;                |
59|           |            | serial port-interrupt               |
60+-----------+------------+-------------------------------------+
61| PINMUX    | on-chip    | pinmux                              |
62+-----------+------------+-------------------------------------+
63| GPIO      | on-chip    | gpio                                |
64+-----------+------------+-------------------------------------+
65| FLASH     | on-chip    | flash memory                        |
66+-----------+------------+-------------------------------------+
67| ETHERNET  | on-chip    | ethernet  (*)                       |
68+-----------+------------+-------------------------------------+
69| RNG       | on-chip    | True Random number generator        |
70+-----------+------------+-------------------------------------+
71| FMC       | on-chip    | memc (SDRAM)                        |
72+-----------+------------+-------------------------------------+
73| SPI       | on-chip    | spi                                 |
74+-----------+------------+-------------------------------------+
75| QSPI NOR  | on-chip    | off-chip flash                      |
76+-----------+------------+-------------------------------------+
77| SDMMC     | on-chip    | disk access                         |
78+-----------+------------+-------------------------------------+
79| IPM       | on-chip    | virtual mailbox based on HSEM       |
80+-----------+------------+-------------------------------------+
81| DISPLAY   | on-chip    | MIPI DSI Host with shield (MP1166)  |
82|           |            | st_b_lcd40_dsi1_mb1166              |
83+-----------+------------+-------------------------------------+
84
85(*) From UM2411 Rev 4:
86   With the default setting, the Ethernet feature is not working because of
87   a conflict between ETH_MDC and SAI4_D1 of the MEMs digital microphone.
88   Make sure you have SB8 closed and SB21 open to get Ethernet working.
89
90Other hardware features are not yet supported on Zephyr porting.
91
92The default configuration per core can be found in the defconfig files:
93``boards/arm/stm32h747i_disco/stm32h747i_disco_defconfig_m7`` and
94``boards/arm/stm32h747i_disco/stm32h747i_disco_defconfig_m4``
95
96Pin Mapping
97===========
98
99STM32H747I Discovery kit has 9 GPIO controllers. These controllers are responsible for pin muxing,
100input/output, pull-up, etc.
101
102For mode details please refer to `STM32H747I-DISCO website`_.
103
104Default Zephyr Peripheral Mapping:
105----------------------------------
106
107- UART_1 TX/RX : PA9/PA10 (ST-Link Virtual Port Com)
108- UART_8 TX/RX : PJ8/PJ9 (Arduino Serial)
109- SPI_5 NSS/SCK/MISO/MOSI : PK1/PK0/PJ11/PJ10 (Arduino SPI)
110- SDMMC_1 D0/D1/D2/D3/CK/CMD: PC8/PC9/PC10/PC11/PC12/PD2
111- LD1 : PI12
112- LD2 : PI13
113- LD3 : PI14
114- LD4 : PI15
115- W-UP : PC13
116- J-CENTER : PK2
117- J-DOWN : PK3
118- J-LEFT : PK4
119- J-RIGHT : PK5
120- J-UP : PK6
121
122System Clock
123============
124
125The STM32H747I System Clock can be driven by an internal or external oscillator,
126as well as by the main PLL clock. By default, the CPU1 (Cortex-M7) System clock
127is driven by the PLL clock at 400MHz, and the CPU2 (Cortex-M4) System clock
128is driven at 200MHz. PLL clock is feed by a 25MHz high speed external clock.
129
130Serial Port
131===========
132
133The STM32H747I Discovery kit has up to 8 UARTs.
134Default configuration assigns USART1 and UART8 to the CPU1. The Zephyr console
135output is assigned to UART1 which connected to the onboard ST-LINK/V3.0. Virtual
136COM port interface. Default communication settings are 115200 8N1.
137
138Ethernet
139========
140
141**Disclaimer:** This section is mostly copy-paste of corresponding
142`DISCO_H747I modifications for Ethernet`_ mbed blog post. The author of this
143article sincerely allowed to use the images and his knowledge about necessary
144HW modifications to get Ethernet working with this board.
145
146To get Ethernet working following HW modifications are required:
147
148- **SB21**, **SB45** and **R87** should be opened
149- **SB22**, **SB44**, **SB17** and **SB8** should be closed
150
151Following two images shows necessary changes on the board marked:
152
153.. image:: img/disco_h747i_ethernet_modification_1.jpg
154     :align: center
155     :alt: STM32H747I-DISCO - Ethernet modification 1 (**SB44**, **SB45**)
156
157.. image:: img/disco_h747i_ethernet_modification_2.jpg
158     :align: center
159     :alt: STM32H747I-DISCO - Ethernet modification 2 (**SB21**, **R87**, **SB22**, **SB17** and **SB8**)
160
161Display
162=======
163
164The STM32H747I Discovery kit has a dedicated DSI LCD connector **CN15**, where
165the MB1166 (B-LCD40-DSI1) display extension board can be mounted. Enable display
166support in Zephyr by adding the shield ``st_b_lcd40_dsi1_mb1166`` to your build
167command, for example:
168
169.. zephyr-app-commands::
170   :zephyr-app: samples/drivers/display
171   :board: stm32h747i_disco_m7
172   :shield: st_b_lcd40_dsi1_mb1166
173   :goals: build flash
174
175Resources sharing
176=================
177
178The dual core nature of STM32H747 SoC requires sharing HW resources between the
179two cores. This is done in 3 ways:
180
181- **Compilation**: Clock configuration is only accessible to M7 core. M4 core only
182  has access to bus clock activation and deactivation.
183- **Static pre-compilation assignment**: Peripherals such as a UART are assigned in
184  devicetree before compilation. The user must ensure peripherals are not assigned
185  to both cores at the same time.
186- **Run time protection**: Interrupt-controller and GPIO configurations could be
187  accessed by both cores at run time. Accesses are protected by a hardware semaphore
188  to avoid potential concurrent access issues.
189
190Programming and Debugging
191*************************
192
193Applications for the ``stm32h747i_disco`` board should be built per core target,
194using either ``stm32h747i_disco_m7`` or ```stm32h747i_disco_m4`` as the target.
195See :ref:`build_an_application` for more information about application builds.
196
197.. note::
198
199   If using OpenOCD you will need a recent development version as the last
200   official release does not support H7 dualcore yet.
201   Also, with OpenOCD, sometimes, flashing is not working. It is necessary to
202   erase the flash (with STM32CubeProgrammer for example) to make it work again.
203   Debugging with OpenOCD is currently working for this board only with Cortex M7,
204   not Cortex M4.
205
206
207Flashing
208========
209
210Flashing operation will depend on the target to be flashed and the SoC
211option bytes configuration.
212It is advised to use `STM32CubeProgrammer`_ to check and update option bytes
213configuration and flash ``stm32h747i_disco_m7`` and ``stm32h747i_disco_m4`` targets.
214
215By default:
216
217  - CPU1 (Cortex-M7) boot address is set to 0x80000000 (OB: BOOT_CM7_ADD0)
218  - CPU2 (Cortex-M4) boot address is set to 0x81000000 (OB: BOOT_CM4_ADD0)
219
220Also, default out of the box board configuration enables CM7 and CM4 boot when
221board is powered (Option bytes BCM7 and BCM4 are checked).
222It is possible to change Option Bytes so that CM7 boots first in stand alone,
223and CM7 will wakeup CM4 after clock initialization.
224Drivers are able to take into account both Option Bytes configurations
225automatically.
226
227Zephyr flash configuration has been set to meet these default settings.
228
229Flashing an application to STM32H747I M7 Core
230---------------------------------------------
231
232First, connect the STM32H747I Discovery kit to your host computer using
233the USB port to prepare it for flashing. Then build and flash your application.
234
235Here is an example for the :ref:`hello_world` application.
236
237.. zephyr-app-commands::
238   :zephyr-app: samples/hello_world
239   :board: stm32h747i_disco_m7
240   :goals: build flash
241
242Run a serial host program to connect with your board:
243
244.. code-block:: console
245
246   $ minicom -D /dev/ttyACM0
247
248You should see the following message on the console:
249
250.. code-block:: console
251
252   Hello World! stm32h747i_disco_m7
253
254.. note::
255  Sometimes, flashing is not working. It is necessary to erase the flash
256  (with STM32CubeProgrammer for example) to make it work again.
257
258Similarly, you can build and flash samples on the M4 target. For this, please
259take care of the resource sharing (UART port used for console for instance).
260
261Here is an example for the :zephyr:code-sample:`blinky` application on M4 core.
262
263.. zephyr-app-commands::
264   :zephyr-app: samples/basic/blinky
265   :board: stm32h747i_disco_m4
266   :goals: build flash
267
268Debugging
269=========
270
271You can debug an application in the usual way.  Here is an example for the
272:ref:`hello_world` application.
273
274.. zephyr-app-commands::
275   :zephyr-app: samples/hello_world
276   :board: stm32h747i_disco_m7
277   :goals: debug
278
279Debugging with west is currently not available on Cortex M4 side.
280In order to debug a Zephyr application on Cortex M4 side, you can use
281`STM32CubeIDE`_.
282
283.. _STM32H747I-DISCO website:
284   https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
285
286.. _STM32H747XI on www.st.com:
287   https://www.st.com/content/st_com/en/products/microcontrollers-microprocessors/stm32-32-bit-arm-cortex-mcus/stm32-high-performance-mcus/stm32h7-series/stm32h747-757/stm32h747xi.html
288
289.. _STM32H747xx reference manual:
290   https://www.st.com/resource/en/reference_manual/dm00176879.pdf
291
292.. _STM32H747xx datasheet:
293   https://www.st.com/resource/en/datasheet/stm32h747xi.pdf
294
295.. _STM32CubeProgrammer:
296   https://www.st.com/en/development-tools/stm32cubeprog.html
297
298.. _DISCO_H747I modifications for Ethernet:
299   https://os.mbed.com/teams/ST/wiki/DISCO_H747I-modifications-for-Ethernet
300
301.. _STM32CubeIDE:
302   https://www.st.com/en/development-tools/stm32cubeide.html
303