1/*
2 * Copyright (c) 2021 SILA Embedded Solutions GmbH
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8#include <st/h7/stm32h735Xg.dtsi>
9#include <st/h7/stm32h735igkx-pinctrl.dtsi>
10#include "pmod_connector.dtsi"
11#include <zephyr/dt-bindings/input/input-event-codes.h>
12
13/ {
14	model = "STMicroelectronics STM32H735G DISCOVERY board";
15	compatible = "st,stm32h735g-disco";
16
17	chosen {
18		zephyr,console = &usart3;
19		zephyr,shell-uart = &usart3;
20		zephyr,sram = &sram0;
21		zephyr,flash = &flash0;
22	};
23
24	leds {
25		compatible = "gpio-leds";
26		red_led: led_1 {
27			gpios = <&gpioc 2 GPIO_ACTIVE_LOW>;
28			label = "User LD2";
29		};
30		green_led: led_2 {
31			gpios = <&gpioc 3 GPIO_ACTIVE_LOW>;
32			label = "User LD1";
33		};
34	};
35
36	gpio_keys {
37		compatible = "gpio-keys";
38		user_button: button {
39			label = "User";
40			gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
41			zephyr,code = <INPUT_KEY_0>;
42		};
43	};
44
45	aliases {
46		led0 = &red_led;
47		led1 = &green_led;
48		sw0 = &user_button;
49		volt-sensor1 = &vbat;
50	};
51};
52
53&clk_hse {
54	clock-frequency = <DT_FREQ_M(25)>;
55	status = "okay";
56};
57
58&clk_lse {
59	status = "okay";
60};
61
62&clk_lsi {
63	status = "okay";
64};
65
66&clk_hsi48 {
67	status = "okay";
68};
69
70&pll {
71	div-m = <5>;
72	mul-n = <110>;
73	div-p = <1>;
74	div-q = <4>;
75	div-r = <2>;
76	clocks = <&clk_hse>;
77	status = "okay";
78};
79
80&rcc {
81	clocks = <&pll>;
82	clock-frequency = <DT_FREQ_M(550)>;
83	d1cpre = <1>;
84	hpre = <2>;
85	d1ppre = <2>;
86	d2ppre1 = <2>;
87	d2ppre2 = <2>;
88	d3ppre = <2>;
89};
90
91&usart3 {
92	pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
93	pinctrl-names = "default";
94	current-speed = <115200>;
95	status = "okay";
96};
97
98&uart7 {
99	pinctrl-0 = <&uart7_tx_pf7 &uart7_rx_pf6>;
100	pinctrl-names = "default";
101	current-speed = <115200>;
102};
103
104&i2c4 {
105	pinctrl-0 = <&i2c4_scl_pf14 &i2c4_sda_pf15>;
106	pinctrl-names = "default";
107};
108
109&rng {
110	status = "okay";
111};
112
113&adc1 {
114	pinctrl-0 = <&adc1_inp0_pa0_c>;
115	pinctrl-names = "default";
116	st,adc-clock-source = <SYNC>;
117	st,adc-prescaler = <4>;
118	status = "okay";
119};
120
121&mac {
122	pinctrl-0 = <&eth_mdc_pc1
123		     &eth_rxd0_pc4
124		     &eth_rxd1_pc5
125		     &eth_ref_clk_pa1
126		     &eth_mdio_pa2
127		     &eth_crs_dv_pa7
128		     &eth_tx_en_pb11
129		     &eth_txd0_pb12
130		     &eth_txd1_pb13>;
131	pinctrl-names = "default";
132	status = "okay";
133};
134
135&sdmmc1 {
136	pinctrl-0 = <&sdmmc1_d0_pc8
137		     &sdmmc1_d1_pc9
138		     &sdmmc1_d2_pc10
139		     &sdmmc1_d3_pc11
140		     &sdmmc1_ck_pc12
141		     &sdmmc1_cmd_pd2>;
142	pinctrl-names = "default";
143	cd-gpios = <&gpiof 5 GPIO_ACTIVE_LOW>;
144};
145
146&octospi1 {
147	pinctrl-0 = <&octospim_p1_clk_pf10 &octospim_p1_ncs_pg6
148		     &octospim_p1_io0_pd11 &octospim_p1_io1_pd12
149		     &octospim_p1_io2_pe2 &octospim_p1_io3_pd13
150		     &octospim_p1_io4_pd4 &octospim_p1_io5_pd5
151		     &octospim_p1_io6_pg9 &octospim_p1_io7_pd7
152		     &octospim_p1_dqs_pb2>;
153	pinctrl-names = "default";
154
155	status = "okay";
156
157	mx25lm51245: ospi-nor-flash@0 {
158		compatible = "st,stm32-ospi-nor";
159		reg = <0>;
160		ospi-max-frequency = <DT_FREQ_M(50)>;
161		size = <DT_SIZE_M(512)>; /* 64 MBytes */
162		spi-bus-width = <OSPI_OPI_MODE>;
163		data-rate = <OSPI_DTR_TRANSFER>;
164		status = "okay";
165
166		partitions {
167			   compatible = "fixed-partitions";
168			   #address-cells = <1>;
169			   #size-cells = <1>;
170
171			   partition@0 {
172			       label = "nor";
173			       reg = <0x00000000 DT_SIZE_M(4)>;
174			   };
175		};
176	};
177};
178
179&rtc {
180	clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>,
181		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
182	status = "okay";
183
184	backup_regs {
185		status = "okay";
186	};
187};
188
189&vbat {
190	status = "okay";
191};
192