1/*
2 * Copyright (c) Justin Watson 2017
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6/dts-v1/;
7
8#include <atmel/sam4s16c.dtsi>
9#include "sam4s_xplained-pinctrl.dtsi"
10#include <zephyr/dt-bindings/input/input-event-codes.h>
11
12/ {
13	model = "Atmel SAM4S Xplained Board with an Atmel SAM4S16C SoC";
14	compatible = "atmel,sam4s_xplained", "atmel,sam4s16c", "atmel,sam4s";
15
16	aliases {
17		i2c-0 = &twi0;
18		i2c-1 = &twi1;
19		pwm-0 = &pwm0;
20		led0 = &yellow_led_1;
21		led1 = &yellow_led_2;
22		sw0 = &user_button;
23		watchdog0 = &wdt;
24	};
25
26	chosen {
27		zephyr,console = &uart0;
28		zephyr,shell-uart = &uart0;
29		zephyr,sram = &sram0;
30		zephyr,flash = &flash0;
31	};
32
33	sram1: sram@60000000 {
34		compatible = "zephyr,memory-region", "mmio-sram";
35		device_type = "memory";
36		reg = <0x60000000 DT_SIZE_K(512)>;
37		zephyr,memory-region = "SRAM1";
38	};
39
40	sram2: sram@61000000 {
41		compatible = "zephyr,memory-region", "mmio-sram";
42		device_type = "memory";
43		reg = <0x61000000 DT_SIZE_K(512)>;
44		zephyr,memory-region = "SRAM2";
45	};
46
47	leds {
48		compatible = "gpio-leds";
49		yellow_led_1: led_1 {
50			gpios = <&pioc 10 GPIO_ACTIVE_LOW>;
51			label = "LED 1";
52		};
53		yellow_led_2: led_2 {
54			gpios = <&pioc 17 GPIO_ACTIVE_LOW>;
55			label = "LED 2";
56		};
57	};
58
59	gpio_keys {
60		compatible = "gpio-keys";
61		user_button: button_1 {
62			label = "User Button";
63			gpios = <&pioa 5 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
64			zephyr,code = <INPUT_KEY_0>;
65		};
66	};
67
68	xplained1_header: xplained-connector1 {
69		compatible = "atmel-xplained-header";
70		#gpio-cells = <2>;
71		gpio-map-mask = <0xffffffff 0xffffffc0>;
72		gpio-map-pass-thru = <0 0x3f>;		/*           Shared */
73		gpio-map =	<0 0 &pioa  3 0>,	/* TWD0           y */
74				<1 0 &pioa  4 0>,	/* TWCK0          y */
75				<2 0 &piob  2 0>,	/* URXD1            */
76				<3 0 &piob  3 0>,	/* UTXD1            */
77				<4 0 &pioa 31 0>,	/* SPI(CS)          */
78				<5 0 &pioa 13 0>,	/* SPI(MOSI)      y */
79				<6 0 &pioa 12 0>,	/* SPI(MISO)      y */
80				<7 0 &pioa 14 0>;	/* SPI(SCK)       y */
81							/* GND              */
82							/* +3.3V            */
83	};
84
85	xplained2_header: xplained-connector2 {
86		compatible = "atmel-xplained-header";
87		#gpio-cells = <2>;
88		gpio-map-mask = <0xffffffff 0xffffffc0>;
89		gpio-map-pass-thru = <0 0x3f>;		/*           Shared */
90		gpio-map =	<0 0 &pioa 22 0>,	/* GPIO             */
91				<1 0 &pioc 12 0>,	/* GPIO             */
92				<2 0 &piob  0 0>,	/* GPIO             */
93				<3 0 &piob  1 0>,	/* GPIO             */
94				<4 0 &pioa 17 0>,	/* GPIO             */
95				<5 0 &pioa 21 0>,	/* GPIO             */
96				<6 0 &pioc 13 0>,	/* GPIO             */
97				<7 0 &pioc 15 0>;	/* GPIO             */
98							/* GND              */
99							/* +3.3V            */
100	};
101
102	xplained3_header: xplained-connector3 {
103		compatible = "atmel-xplained-header";
104		#gpio-cells = <2>;
105		gpio-map-mask = <0xffffffff 0xffffffc0>;
106		gpio-map-pass-thru = <0 0x3f>;		/*           Shared */
107		gpio-map =	<0 0 &pioa 20 0>,	/* GPIO             */
108				<1 0 &pioa 11 0>,	/* GPIO             */
109				<2 0 &pioa 23 0>,	/* GPIO             */
110				<3 0 &pioa 18 0>,	/* GPIO             */
111				<4 0 &pioa 15 0>,	/* GPIO             */
112				<5 0 &pioa 16 0>,	/* GPIO             */
113				<6 0 &pioa  2 0>,	/* GPIO             */
114				<7 0 &pioc  2 0>;	/* GPIO             */
115							/* GND              */
116							/* +3.3V            */
117	};
118
119	xplained4_header: xplained-connector4 {
120		compatible = "atmel-xplained-header";
121		#gpio-cells = <2>;
122		gpio-map-mask = <0xffffffff 0xffffffc0>;
123		gpio-map-pass-thru = <0 0x3f>;		/*           Shared */
124		gpio-map =	<0 0 &pioa  3 0>,	/* TWD0           y */
125				<1 0 &pioa  4 0>,	/* TWCK0          y */
126				<2 0 &piob  2 0>,	/* URXD1            */
127				<3 0 &piob  3 0>,	/* UTXD1            */
128				<4 0 &pioa 30 0>,	/* SPI(CS)          */
129				<5 0 &pioa 13 0>,	/* SPI(MOSI)      y */
130				<6 0 &pioa 12 0>,	/* SPI(MISO)      y */
131				<7 0 &pioa 14 0>;	/* SPI(SCK)       y */
132							/* GND              */
133							/* +3.3V            */
134	};
135};
136
137&cpu0 {
138	clock-frequency = <120000000>;
139};
140
141&twi0 {
142	status = "okay";
143
144	pinctrl-0 = <&twi0_default>;
145	pinctrl-names = "default";
146};
147
148&spi0 {
149	status = "okay";
150
151	pinctrl-0 = <&spi0_default>;
152	pinctrl-names = "default";
153
154	cs-gpios = <&pioa 31 GPIO_ACTIVE_LOW>,
155		   <&pioa 30 GPIO_ACTIVE_LOW>;
156};
157
158&uart0 {
159	status = "okay";
160	current-speed = <115200>;
161
162	pinctrl-0 = <&uart0_default>;
163	pinctrl-names = "default";
164};
165
166&uart1 {
167	status = "okay";
168	current-speed = <115200>;
169
170	pinctrl-0 = <&uart1_default>;
171	pinctrl-names = "default";
172};
173
174&pwm0 {
175	status = "okay";
176
177	pinctrl-0 = <&pwm0_default>;
178	pinctrl-names = "default";
179};
180
181&adc0 {
182	status = "okay";
183
184	pinctrl-0 = <&adc0_default>;
185	pinctrl-names = "default";
186
187	prescaler = <9>;
188	startup-time = <64>;
189	settling-time = <3>;
190	tracking-time = <2>;
191};
192
193&wdt {
194	status = "okay";
195};
196
197xplained1_i2c: &twi0 {
198};
199
200xplained1_spi: &spi0 {
201};
202
203xplained1_serial: &uart1 {
204};
205
206xplained4_i2c: &twi0 {
207};
208
209xplained4_spi: &spi0 {
210};
211
212xplained4_serial: &uart1 {
213};
214
215&smc {
216	status = "okay";
217	pinctrl-0 = <&smc_default>;
218	pinctrl-names = "default";
219
220	is66wv51216dbll@0 {
221		reg = <0>;
222
223		atmel,smc-write-mode = "nwe";
224		atmel,smc-read-mode = "nrd";
225		atmel,smc-setup-timing = <1 1 1 1>;
226		atmel,smc-pulse-timing = <6 6 6 6>;
227		atmel,smc-cycle-timing = <7 7>;
228	};
229
230	is66wv51216dbll@1 {
231		reg = <1>;
232
233		atmel,smc-write-mode = "nwe";
234		atmel,smc-read-mode = "nrd";
235		atmel,smc-setup-timing = <1 1 1 1>;
236		atmel,smc-pulse-timing = <6 6 6 6>;
237		atmel,smc-cycle-timing = <7 7>;
238	};
239};
240