1/*
2 * Copyright (c) 2022 Nordic Semiconductor
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6&pinctrl {
7	uart0_default: uart0_default {
8		group1 {
9			psels = <NRF_PSEL(UART_TX, 0, 20)>,
10				<NRF_PSEL(UART_RX, 0, 19)>;
11		};
12	};
13
14	uart0_sleep: uart0_sleep {
15		group1 {
16			psels = <NRF_PSEL(UART_TX, 0, 20)>,
17				<NRF_PSEL(UART_RX, 0, 19)>;
18			low-power-enable;
19		};
20	};
21
22	uart1_default: uart1_default {
23		group1 {
24			psels = <NRF_PSEL(UART_TX, 0, 16)>,
25				<NRF_PSEL(UART_RX, 0, 15)>;
26		};
27	};
28
29	uart1_sleep: uart1_sleep {
30		group1 {
31			psels = <NRF_PSEL(UART_TX, 0, 16)>,
32				<NRF_PSEL(UART_RX, 0, 15)>;
33			low-power-enable;
34		};
35	};
36
37	i2c0_default: i2c0_default {
38		group1 {
39			psels = <NRF_PSEL(TWIM_SDA, 0, 13)>,
40				<NRF_PSEL(TWIM_SCL, 0, 14)>;
41		};
42	};
43
44	i2c0_sleep: i2c0_sleep {
45		group1 {
46			psels = <NRF_PSEL(TWIM_SDA, 0, 13)>,
47				<NRF_PSEL(TWIM_SCL, 0, 14)>;
48			low-power-enable;
49		};
50	};
51
52	i2c1_default: i2c1_default {
53		group1 {
54			psels = <NRF_PSEL(TWIM_SDA, 0, 24)>,
55				<NRF_PSEL(TWIM_SCL, 0, 25)>;
56		};
57	};
58
59	i2c1_sleep: i2c1_sleep {
60		group1 {
61			psels = <NRF_PSEL(TWIM_SDA, 0, 24)>,
62				<NRF_PSEL(TWIM_SCL, 0, 25)>;
63			low-power-enable;
64		};
65	};
66
67	spi1_default: spi1_default {
68		group1 {
69			psels = <NRF_PSEL(SPIM_SCK, 1, 11)>,
70				<NRF_PSEL(SPIM_MOSI, 1, 12)>,
71				<NRF_PSEL(SPIM_MISO, 1, 13)>;
72		};
73	};
74
75	spi1_sleep: spi1_sleep {
76		group1 {
77			psels = <NRF_PSEL(SPIM_SCK, 1, 11)>,
78				<NRF_PSEL(SPIM_MOSI, 1, 12)>,
79				<NRF_PSEL(SPIM_MISO, 1, 13)>;
80			low-power-enable;
81		};
82	};
83
84	qspi_default: qspi_default {
85		group1 {
86			psels = <NRF_PSEL(QSPI_SCK, 0, 3)>,
87				<NRF_PSEL(QSPI_IO0, 0, 30)>,
88				<NRF_PSEL(QSPI_IO1, 0, 29)>,
89				<NRF_PSEL(QSPI_IO2, 0, 28)>,
90				<NRF_PSEL(QSPI_IO3, 0, 2)>,
91				<NRF_PSEL(QSPI_CSN, 0, 26)>;
92		};
93	};
94
95	qspi_sleep: qspi_sleep {
96		group1 {
97			psels = <NRF_PSEL(QSPI_SCK, 0, 3)>,
98				<NRF_PSEL(QSPI_IO0, 0, 30)>,
99				<NRF_PSEL(QSPI_IO1, 0, 29)>,
100				<NRF_PSEL(QSPI_IO2, 0, 28)>,
101				<NRF_PSEL(QSPI_IO3, 0, 2)>,
102				<NRF_PSEL(QSPI_CSN, 0, 26)>;
103			low-power-enable;
104		};
105	};
106
107};
108