1.. _mimxrt685_evk: 2 3NXP MIMXRT685-EVK 4################## 5 6Overview 7******** 8 9The i.MX RT600 is a crossover MCU family optimized for 32-bit immersive audio 10playback and voice user interface applications combining a high-performance 11Cadence Tensilica HiFi 4 audio DSP core with a next-generation Cortex-M33 12core. The i.MX RT600 family of crossover MCUs is designed to unlock the 13potential of voice-assisted end nodes with a secure, power-optimized embedded 14processor. 15 16The i.MX RT600 family provides up to 4.5MB of on-chip SRAM and several 17high-bandwidth interfaces to access off-chip flash, including an Octal/Quad SPI 18interface with an on-the-fly decryption engine. 19 20.. image:: mimxrt685_evk.jpg 21 :align: center 22 :alt: MIMXRT685-EVK 23 24Hardware 25******** 26 27- MIMXRT685SFVKB Cortex-M33 (300 MHz, 128 KB TCM) core processor with Cadence Xtensa HiFi4 DSP 28- Onboard, high-speed USB, Link2 debug probe with CMSIS-DAP protocol (supporting Cortex M33 debug only) 29- High speed USB port with micro A/B connector for the host or device functionality 30- UART, I2C and SPI port bridging from i.MX RT685 target to USB via the on-board debug probe 31- 512 MB Macronix Octal SPI Flash operating at 1.8 V 32- 4.5 MB Apmemory PSRAM 33- Full size SD card slot (SDIO) 34- NXP PCA9420UK PMIC 35- User LEDs 36- Reset and User buttons 37- Arduino and PMod/Host expansion connectors 38- NXP FXOS8700CQ accelerometer 39- Stereo audio codec with line in/out and electret microphone 40- Stereo NXP TFA9894 digital amplifiers, with option for external +5V power for higher performance speakers 41- Support for up to eight off-board digital microphones via 12-pin header 42- Two on-board DMICS 43 44For more information about the MIMXRT685 SoC and MIMXRT685-EVK board, see 45these references: 46 47- `i.MX RT685 Website`_ 48- `i.MX RT685 Datasheet`_ 49- `i.MX RT685 Reference Manual`_ 50- `MIMXRT685-EVK Website`_ 51- `MIMXRT685-EVK User Guide`_ 52- `MIMXRT685-EVK Schematics`_ 53 54Supported Features 55================== 56 57NXP considers the MIMXRT685-EVK as a superset board for the i.MX RT6xx 58family of MCUs. This board is a focus for NXP's Full Platform Support for 59Zephyr, to better enable the entire RT6xx family. NXP prioritizes enabling 60this board with new support for Zephyr features. The mimxrt685_evk board 61configuration supports the hardware features below. Another very similar 62board is the :ref:`mimxrt595_evk`, and that board may have additional features 63already supported, which can also be re-used on this mimxrt685_evk board: 64 65+-----------+------------+-------------------------------------+ 66| Interface | Controller | Driver/Component | 67+===========+============+=====================================+ 68| NVIC | on-chip | nested vector interrupt controller | 69+-----------+------------+-------------------------------------+ 70| SYSTICK | on-chip | systick | 71+-----------+------------+-------------------------------------+ 72| OS_TIMER | on-chip | os timer | 73+-----------+------------+-------------------------------------+ 74| IOCON | on-chip | pinmux | 75+-----------+------------+-------------------------------------+ 76| GPIO | on-chip | gpio | 77+-----------+------------+-------------------------------------+ 78| FLASH | on-chip | OctalSPI Flash | 79+-----------+------------+-------------------------------------+ 80| USART | on-chip | serial port-polling; | 81| | | serial port-interrupt | 82+-----------+------------+-------------------------------------+ 83| I2C | on-chip | i2c | 84+-----------+------------+-------------------------------------+ 85| SPI | on-chip | spi | 86+-----------+------------+-------------------------------------+ 87| I2S | on-chip | i2s | 88+-----------+------------+-------------------------------------+ 89| CLOCK | on-chip | clock_control | 90+-----------+------------+-------------------------------------+ 91| HWINFO | on-chip | Unique device serial number | 92+-----------+------------+-------------------------------------+ 93| RTC | on-chip | counter | 94+-----------+------------+-------------------------------------+ 95| PWM | on-chip | pwm | 96+-----------+------------+-------------------------------------+ 97| WDT | on-chip | watchdog | 98+-----------+------------+-------------------------------------+ 99| SDHC | on-chip | disk access | 100+-----------+------------+-------------------------------------+ 101| USB | on-chip | USB device | 102+-----------+------------+-------------------------------------+ 103| ADC | on-chip | adc | 104+-----------+------------+-------------------------------------+ 105| CTIMER | on-chip | counter | 106+-----------+------------+-------------------------------------+ 107| TRNG | on-chip | entropy | 108+-----------+------------+-------------------------------------+ 109| FLEXSPI | on-chip | flash programming | 110+-----------+------------+-------------------------------------+ 111 112The default configuration can be found in the defconfig file: 113 114 ``boards/arm/mimxrt685_evk/mimxrt685_evk_cm33_defconfig`` 115 116Other hardware features are not currently supported by the port. 117 118Connections and IOs 119=================== 120 121The MIMXRT685 SoC has IOCON registers, which can be used to configure the 122functionality of a pin. 123 124+---------+-----------------+----------------------------+ 125| Name | Function | Usage | 126+=========+=================+============================+ 127| PIO0_2 | USART | USART RX | 128+---------+-----------------+----------------------------+ 129| PIO0_1 | USART | USART TX | 130+---------+-----------------+----------------------------+ 131| PIO0_14 | GPIO | GREEN LED | 132+---------+-----------------+----------------------------+ 133| PIO1_1 | GPIO | SW0 | 134+---------+-----------------+----------------------------+ 135| PIO0_17 | I2C | I2C SDA | 136+---------+-----------------+----------------------------+ 137| PIO0_18 | I2C | I2C SCL | 138+---------+-----------------+----------------------------+ 139| PIO1_5 | GPIO | FXOS8700 TRIGGER | 140+---------+-----------------+----------------------------+ 141| PIO1_5 | SPI | SPI MOSI | 142+---------+-----------------+----------------------------+ 143| PIO1_4 | SPI | SPI MISO | 144+---------+-----------------+----------------------------+ 145| PIO1_3 | SPI | SPI SCK | 146+---------+-----------------+----------------------------+ 147| PIO1_6 | SPI | SPI SSEL | 148+---------+-----------------+----------------------------+ 149| PIO0_23 | I2S | I2S DATAOUT | 150+---------+-----------------+----------------------------+ 151| PIO0_22 | I2S | I2S TX WS | 152+---------+-----------------+----------------------------+ 153| PIO0_21 | I2S | I2S TX SCK | 154+---------+-----------------+----------------------------+ 155| PIO0_9 | I2S | I2S DATAIN | 156+---------+-----------------+----------------------------+ 157| PIO0_29 | USART | USART TX | 158+---------+-----------------+----------------------------+ 159| PIO0_30 | USART | USART RX | 160+---------+-----------------+----------------------------+ 161| PIO1_11 | FLEXSPI0B_DATA0 | OctalSPI Flash | 162+---------+-----------------+----------------------------+ 163| PIO1_12 | FLEXSPI0B_DATA1 | OctalSPI Flash | 164+---------+-----------------+----------------------------+ 165| PIO1_13 | FLEXSPI0B_DATA2 | OctalSPI Flash | 166+---------+-----------------+----------------------------+ 167| PIO1_14 | FLEXSPI0B_DATA3 | OctalSPI Flash | 168+---------+-----------------+----------------------------+ 169| PIO1_29 | FLEXSPI0B_SCLK | OctalSPI Flash | 170+---------+-----------------+----------------------------+ 171| PIO2_12 | PIO2_12 | OctalSPI Flash | 172+---------+-----------------+----------------------------+ 173| PIO2_17 | FLEXSPI0B_DATA4 | OctalSPI Flash | 174+---------+-----------------+----------------------------+ 175| PIO2_18 | FLEXSPI0B_DATA5 | OctalSPI Flash | 176+---------+-----------------+----------------------------+ 177| PIO2_19 | FLEXSPI0B_SS0_N | OctalSPI Flash | 178+---------+-----------------+----------------------------+ 179| PIO2_22 | FLEXSPI0B_DATA6 | OctalSPI Flash | 180+---------+-----------------+----------------------------+ 181| PIO2_23 | FLEXSPI0B_DATA7 | OctalSPI Flash | 182+---------+-----------------+----------------------------+ 183| PIO0_27 | SCT0_OUT7 | PWM | 184+---------+-----------------+----------------------------+ 185| PIO1_30 | SD0_CLK | SD card | 186+---------+-----------------+----------------------------+ 187| PIO1_31 | SD0_CMD | SD card | 188+---------+-----------------+----------------------------+ 189| PIO2_0 | SD0_D0 | SD card | 190+---------+-----------------+----------------------------+ 191| PIO2_1 | SD0_D1 | SD card | 192+---------+-----------------+----------------------------+ 193| PIO2_2 | SD0_D2 | SD card | 194+---------+-----------------+----------------------------+ 195| PIO2_3 | SD0_D3 | SD card | 196+---------+-----------------+----------------------------+ 197| PIO2_4 | SD0_WR_PRT | SD card | 198+---------+-----------------+----------------------------+ 199| PIO2_9 | SD0_CD | SD card | 200+---------+-----------------+----------------------------+ 201| PIO2_10 | SD0_RST | SD card | 202+---------+-----------------+----------------------------+ 203 204System Clock 205============ 206 207The MIMXRT685 EVK is configured to use the OS Event timer 208as a source for the system clock. 209 210Serial Port 211=========== 212 213The MIMXRT685 SoC has 8 FLEXCOMM interfaces for serial communication. One is 214configured as USART for the console and the remaining are not used. 215 216Programming and Debugging 217************************* 218 219Build and flash applications as usual (see :ref:`build_an_application` and 220:ref:`application_run` for more details). 221 222Configuring a Debug Probe 223========================= 224 225A debug probe is used for both flashing and debugging the board. This board is 226configured by default to use the LPC-Link2. 227 228.. tabs:: 229 230 .. group-tab:: LPCLink2 JLink Onboard 231 232 233 1. Install the :ref:`jlink-debug-host-tools` and make sure they are in your search path. 234 2. To connect the SWD signals to onboard debug circuit, install jumpers JP17, JP18 and JP19, 235 if not already done (these jumpers are installed by default). 236 3. Follow the instructions in :ref:`lpclink2-jlink-onboard-debug-probe` to program the 237 J-Link firmware. Please make sure you have the latest firmware for this board. 238 239 .. group-tab:: JLink External 240 241 242 1. Install the :ref:`jlink-debug-host-tools` and make sure they are in your search path. 243 244 2. To disconnect the SWD signals from onboard debug circuit, **remove** jumpers J17, J18, 245 and J19 (these are installed by default). 246 247 3. Connect the J-Link probe to J2 10-pin header. 248 249 See :ref:`jlink-external-debug-probe` for more information. 250 251Configuring a Console 252===================== 253 254Connect a USB cable from your PC to J16, and use the serial terminal of your choice 255(minicom, putty, etc.) with the following settings: 256 257- Speed: 115200 258- Data: 8 bits 259- Parity: None 260- Stop bits: 1 261 262Flashing 263======== 264 265Here is an example for the :ref:`hello_world` application. This example uses the 266:ref:`jlink-debug-host-tools` as default. 267 268.. zephyr-app-commands:: 269 :zephyr-app: samples/hello_world 270 :board: mimxrt685_evk_cm33 271 :goals: flash 272 273Open a serial terminal, reset the board (press the RESET button), and you should 274see the following message in the terminal: 275 276.. code-block:: console 277 278 ***** Booting Zephyr OS v1.14.0 ***** 279 Hello World! mimxrt685_evk_cm33 280 281Debugging 282========= 283 284Here is an example for the :ref:`hello_world` application. This example uses the 285:ref:`jlink-debug-host-tools` as default. 286 287.. zephyr-app-commands:: 288 :zephyr-app: samples/hello_world 289 :board: mimxrt685_evk_cm33 290 :goals: debug 291 292Open a serial terminal, step through the application in your debugger, and you 293should see the following message in the terminal: 294 295.. code-block:: console 296 297 ***** Booting Zephyr OS zephyr-v2.3.0 ***** 298 Hello World! mimxrt685_evk_cm33 299 300Troubleshooting 301=============== 302 303If the debug probe fails to connect with the following error, it's possible 304that the image in flash is interfering and causing this issue. 305 306.. code-block:: console 307 308 Remote debugging using :2331 309 Remote communication error. Target disconnected.: Connection reset by peer. 310 "monitor" command not supported by this target. 311 "monitor" command not supported by this target. 312 You can't do that when your target is `exec' 313 (gdb) Could not connect to target. 314 Please check power, connection and settings. 315 316You can fix it by erasing and reprogramming the flash with the following 317steps: 318 319#. Set the SW5 DIP switches to ON-ON-ON to prevent booting from flash. 320 321#. Reset by pressing SW3 322 323#. Run ``west debug`` or ``west flash`` again with a known working Zephyr 324 application (example "Hello World"). 325 326#. Set the SW5 DIP switches to ON-OFF-ON to boot from flash. 327 328#. Reset by pressing SW3 329 330.. _MIMXRT685-EVK Website: 331 https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/i-mx-rt600-evaluation-kit:MIMXRT685-EVK 332 333.. _MIMXRT685-EVK User Guide: 334 https://www.nxp.com/webapp/Download?colCode=UM11159 335 336.. _MIMXRT685-EVK Schematics: 337 https://www.nxp.com/downloads/en/design-support/RT685-DESIGNFILES.zip 338 339.. _i.MX RT685 Website: 340 https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/i-mx-rt-crossover-mcus/i-mx-rt600-crossover-mcu-with-arm-cortex-m33-and-dsp-cores:i.MX-RT600 341 342.. _i.MX RT685 Datasheet: 343 https://www.nxp.com/docs/en/data-sheet/DS-RT600.pdf 344 345.. _i.MX RT685 Reference Manual: 346 https://www.nxp.com/webapp/Download?colCode=UM11147 347