1/*
2 * Copyright (c) 2022, NXP
3 * SPDX-License-Identifier: Apache-2.0
4 *
5 * Note: File generated by imx_cfg_utils.py
6 * from mimxrt1064_evk.mex
7 */
8
9#include <nxp/nxp_imx/rt/mimxrt1064dvl6a-pinctrl.dtsi>
10
11&pinctrl {
12	/* ADC1 inputs 0 and 15 */
13	pinmux_adc1: pinmux_adc1 {
14		group0 {
15			pinmux = <&iomuxc_gpio_ad_b1_11_adc1_in0>,
16				<&iomuxc_gpio_ad_b1_10_adc1_in15>;
17			bias-disable;
18			drive-strength = "r0-6";
19			slew-rate = "slow";
20			nxp,speed = "100-mhz";
21		};
22	};
23
24	/* conflicts with lpuart3 and flexcan1 */
25	pinmux_csi: pinmux_csi {
26		group0 {
27			pinmux = <&iomuxc_gpio_ad_b1_02_gpio1_io18>;
28			drive-strength = "r0-6";
29			bias-pull-down;
30			bias-pull-down-value = "100k";
31			slew-rate = "slow";
32			nxp,speed = "100-mhz";
33		};
34		group1 {
35			pinmux = <&iomuxc_gpio_ad_b1_04_csi_pixclk>,
36				<&iomuxc_gpio_ad_b1_05_csi_mclk>,
37				<&iomuxc_gpio_ad_b1_06_csi_vsync>,
38				<&iomuxc_gpio_ad_b1_07_csi_hsync>,
39				<&iomuxc_gpio_ad_b1_08_csi_data09>,
40				<&iomuxc_gpio_ad_b1_09_csi_data08>,
41				<&iomuxc_gpio_ad_b1_10_csi_data07>,
42				<&iomuxc_gpio_ad_b1_11_csi_data06>,
43				<&iomuxc_gpio_ad_b1_12_csi_data05>,
44				<&iomuxc_gpio_ad_b1_13_csi_data04>,
45				<&iomuxc_gpio_ad_b1_14_csi_data03>,
46				<&iomuxc_gpio_ad_b1_15_csi_data02>;
47			drive-strength = "r0-6";
48			slew-rate = "slow";
49			nxp,speed = "100-mhz";
50		};
51	};
52
53	/* Note: USER_LED conflicts with ENET_RST */
54	pinmux_enet: pinmux_enet {
55		group0 {
56			pinmux = <&iomuxc_gpio_b1_10_enet_ref_clk>;
57			bias-disable;
58			drive-strength = "r0-6";
59			slew-rate = "fast";
60			nxp,speed = "50-mhz";
61			input-enable;
62		};
63		group1 {
64			pinmux = <&iomuxc_gpio_ad_b0_10_gpio1_io10>,
65				<&iomuxc_gpio_ad_b0_09_gpio1_io09>;
66			drive-strength = "r0-5";
67			bias-pull-up;
68			bias-pull-up-value = "100k";
69			slew-rate = "fast";
70			nxp,speed = "100-mhz";
71		};
72		group2 {
73			pinmux = <&iomuxc_gpio_b1_04_enet_rx_data0>,
74				<&iomuxc_gpio_b1_05_enet_rx_data1>,
75				<&iomuxc_gpio_b1_06_enet_rx_en>,
76				<&iomuxc_gpio_b1_07_enet_tx_data0>,
77				<&iomuxc_gpio_b1_08_enet_tx_data1>,
78				<&iomuxc_gpio_b1_09_enet_tx_en>,
79				<&iomuxc_gpio_b1_11_enet_rx_er>,
80				<&iomuxc_gpio_emc_40_enet_mdc>,
81				<&iomuxc_gpio_emc_41_enet_mdio>;
82			drive-strength = "r0-5";
83			bias-pull-up;
84			bias-pull-up-value = "100k";
85			slew-rate = "fast";
86			nxp,speed = "200-mhz";
87		};
88	};
89
90	/* conflicts with SAI1 */
91	pinmux_flexcan1: pinmux_flexcan1 {
92		group0 {
93			pinmux = <&iomuxc_gpio_ad_b1_08_flexcan1_tx>,
94				<&iomuxc_gpio_ad_b1_09_flexcan1_rx>;
95			drive-strength = "r0-6";
96			slew-rate = "slow";
97			nxp,speed = "100-mhz";
98		};
99	};
100
101	pinmux_flexcan2: pinmux_flexcan2 {
102		group0 {
103			pinmux = <&iomuxc_gpio_ad_b0_14_flexcan2_tx>,
104				<&iomuxc_gpio_ad_b0_15_flexcan2_rx>;
105			drive-strength = "r0-6";
106			slew-rate = "slow";
107			nxp,speed = "100-mhz";
108		};
109	};
110
111	pinmux_flexcan3: pinmux_flexcan3 {
112		group0 {
113			pinmux = <&iomuxc_gpio_emc_36_flexcan3_tx>,
114				<&iomuxc_gpio_emc_37_flexcan3_rx>;
115			drive-strength = "r0-6";
116			slew-rate = "slow";
117			nxp,speed = "100-mhz";
118		};
119	};
120
121	/* flexpwm output for board LED */
122	pinmux_flexpwm2: pinmux_flexpwm2 {
123		group0 {
124			pinmux = <&iomuxc_gpio_ad_b0_09_flexpwm2_pwma3>;
125			drive-strength = "r0-4";
126			bias-pull-up;
127			bias-pull-up-value = "47k";
128			slew-rate = "slow";
129			nxp,speed = "100-mhz";
130		};
131	};
132
133	/* FLEXSPI1 is connected to external flash */
134	pinmux_flexspi1: pinmux_flexspi1 {
135		group0 {
136			pinmux = <&iomuxc_gpio_sd_b1_05_flexspi_a_dqs>,
137				<&iomuxc_gpio_sd_b1_06_flexspi_a_ss0_b>,
138				<&iomuxc_gpio_sd_b1_07_flexspi_a_sclk>,
139				<&iomuxc_gpio_sd_b1_08_flexspi_a_data0>,
140				<&iomuxc_gpio_sd_b1_09_flexspi_a_data1>,
141				<&iomuxc_gpio_sd_b1_10_flexspi_a_data2>,
142				<&iomuxc_gpio_sd_b1_11_flexspi_a_data3>;
143			drive-strength = "r0-6";
144			slew-rate = "fast";
145			nxp,speed = "200-mhz";
146			input-enable;
147		};
148	};
149
150	/* Configures pin routing and optionally pin electrical features. */
151	pinmux_lcdif: pinmux_lcdif {
152		group0 {
153			pinmux = <&iomuxc_gpio_b0_00_lcdif_clk>,
154				<&iomuxc_gpio_b0_01_lcdif_enable>,
155				<&iomuxc_gpio_b0_02_lcdif_hsync>,
156				<&iomuxc_gpio_b0_03_lcdif_vsync>,
157				<&iomuxc_gpio_b0_04_lcdif_data00>,
158				<&iomuxc_gpio_b0_05_lcdif_data01>,
159				<&iomuxc_gpio_b0_06_lcdif_data02>,
160				<&iomuxc_gpio_b0_07_lcdif_data03>,
161				<&iomuxc_gpio_b0_08_lcdif_data04>,
162				<&iomuxc_gpio_b0_09_lcdif_data05>,
163				<&iomuxc_gpio_b0_10_lcdif_data06>,
164				<&iomuxc_gpio_b0_11_lcdif_data07>,
165				<&iomuxc_gpio_b0_12_lcdif_data08>,
166				<&iomuxc_gpio_b0_13_lcdif_data09>,
167				<&iomuxc_gpio_b0_14_lcdif_data10>,
168				<&iomuxc_gpio_b0_15_lcdif_data11>,
169				<&iomuxc_gpio_b1_00_lcdif_data12>,
170				<&iomuxc_gpio_b1_01_lcdif_data13>,
171				<&iomuxc_gpio_b1_02_lcdif_data14>,
172				<&iomuxc_gpio_b1_03_lcdif_data15>;
173			drive-strength = "r0-6";
174			input-schmitt-enable;
175			bias-pull-up;
176			bias-pull-up-value = "100k";
177			slew-rate = "slow";
178			nxp,speed = "100-mhz";
179		};
180		group1 {
181			pinmux = <&iomuxc_gpio_ad_b0_02_gpio1_io02>,
182				<&iomuxc_gpio_b1_15_gpio2_io31>;
183			drive-strength = "r0-6";
184			slew-rate = "slow";
185			nxp,speed = "100-mhz";
186		};
187	};
188
189	pinmux_lpi2c1: pinmux_lpi2c1 {
190		group0 {
191			pinmux = <&iomuxc_gpio_ad_b1_01_lpi2c1_sda>,
192				<&iomuxc_gpio_ad_b1_00_lpi2c1_scl>;
193			drive-strength = "r0-6";
194			drive-open-drain;
195			slew-rate = "slow";
196			nxp,speed = "100-mhz";
197			input-enable;
198		};
199	};
200
201	/* Conflicts with USDHC pins. Connect R278, R279, R280, and R281 on evk board */
202	pinmux_lpspi1: pinmux_lpspi1 {
203		group0 {
204			pinmux = <&iomuxc_gpio_sd_b0_01_lpspi1_pcs0>,
205				<&iomuxc_gpio_sd_b0_00_lpspi1_sck>,
206				<&iomuxc_gpio_sd_b0_03_lpspi1_sdi>,
207				<&iomuxc_gpio_sd_b0_02_lpspi1_sdo>;
208			drive-strength = "r0-6";
209			slew-rate = "slow";
210			nxp,speed = "100-mhz";
211		};
212	};
213
214	/* conflicts with lcdif pins */
215	pinmux_lpspi3: pinmux_lpspi3 {
216		group0 {
217			pinmux = <&iomuxc_gpio_ad_b0_03_lpspi3_pcs0>,
218				<&iomuxc_gpio_ad_b0_00_lpspi3_sck>,
219				<&iomuxc_gpio_ad_b0_02_lpspi3_sdi>,
220				<&iomuxc_gpio_ad_b0_01_lpspi3_sdo>;
221			drive-strength = "r0-6";
222			slew-rate = "slow";
223			nxp,speed = "100-mhz";
224		};
225	};
226
227	pinmux_lpuart1: pinmux_lpuart1 {
228		group0 {
229			pinmux = <&iomuxc_gpio_ad_b0_13_lpuart1_rx>,
230				<&iomuxc_gpio_ad_b0_12_lpuart1_tx>;
231			drive-strength = "r0-6";
232			slew-rate = "slow";
233			nxp,speed = "100-mhz";
234		};
235	};
236
237	pinmux_lpuart1_sleep: pinmux_lpuart1_sleep {
238		group0 {
239			pinmux = <&iomuxc_gpio_ad_b0_13_gpio1_io13>;
240			drive-strength = "r0";
241			bias-pull-up;
242			bias-pull-up-value = "100k";
243			slew-rate = "slow";
244			nxp,speed = "50-mhz";
245		};
246		group1 {
247			pinmux = <&iomuxc_gpio_ad_b0_12_lpuart1_tx>;
248			drive-strength = "r0-6";
249			slew-rate = "slow";
250			nxp,speed = "100-mhz";
251		};
252	};
253
254	pinmux_lpuart3: pinmux_lpuart3 {
255		group0 {
256			pinmux = <&iomuxc_gpio_ad_b1_06_lpuart3_tx>,
257				<&iomuxc_gpio_ad_b1_07_lpuart3_rx>;
258			drive-strength = "r0-6";
259			slew-rate = "slow";
260			nxp,speed = "100-mhz";
261		};
262	};
263
264	/* Flow control for lpuart3 */
265	pinmux_lpuart3_flow_control: pinmux_lpuart3_flow_control {
266		group0 {
267			pinmux = <&iomuxc_gpio_ad_b1_06_lpuart3_tx>,
268				<&iomuxc_gpio_ad_b1_07_lpuart3_rx>,
269				<&iomuxc_gpio_ad_b1_04_lpuart3_cts_b>,
270				<&iomuxc_gpio_ad_b1_05_lpuart3_rts_b>;
271			drive-strength = "r0-6";
272			slew-rate = "slow";
273			nxp,speed = "100-mhz";
274		};
275	};
276
277	pinmux_lpuart3_sleep: pinmux_lpuart3_sleep {
278		group0 {
279			pinmux = <&iomuxc_gpio_ad_b1_06_gpio1_io22>;
280			drive-strength = "r0";
281			bias-pull-up;
282			bias-pull-up-value = "100k";
283			slew-rate = "slow";
284			nxp,speed = "100-mhz";
285		};
286		group1 {
287			pinmux = <&iomuxc_gpio_ad_b1_07_lpuart3_rx>;
288			drive-strength = "r0-6";
289			slew-rate = "slow";
290			nxp,speed = "100-mhz";
291		};
292	};
293
294	pinmux_ptp: pinmux_ptp {
295		group0 {
296			pinmux = <&iomuxc_gpio_ad_b1_02_enet_1588_event2_out>,
297				<&iomuxc_gpio_ad_b1_03_enet_1588_event2_in>;
298			drive-strength = "r0-6";
299			slew-rate = "slow";
300			nxp,speed = "100-mhz";
301		};
302	};
303
304	pinmux_sai1: pinmux_sai1 {
305		group0 {
306			pinmux = <&iomuxc_gpio_ad_b1_09_sai1_mclk>,
307				<&iomuxc_gpio_ad_b1_13_sai1_tx_data0>,
308				<&iomuxc_gpio_ad_b1_12_sai1_rx_data0>,
309				<&iomuxc_gpio_ad_b1_14_sai1_tx_bclk>,
310				<&iomuxc_gpio_ad_b1_15_sai1_tx_sync>;
311			drive-strength = "r0-6";
312			slew-rate = "slow";
313			nxp,speed = "100-mhz";
314		};
315	};
316
317	/* note swo is configured with a cpu frequency of 132mhz and swo frequency of 7500khz */
318	pinmux_swo: pinmux_swo {
319		group0 {
320			pinmux = <&iomuxc_gpio_ad_b0_10_arm_trace_swo>;
321			drive-strength = "r0-6";
322			slew-rate = "fast";
323			nxp,speed = "100-mhz";
324		};
325	};
326
327	pinmux_usdhc1: pinmux_usdhc1 {
328		group0 {
329			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
330			bias-disable;
331			drive-strength = "r0";
332			input-schmitt-enable;
333			slew-rate = "fast";
334			nxp,speed = "100-mhz";
335		};
336		group1 {
337			pinmux = <&iomuxc_gpio_b1_12_gpio2_io28>,
338				<&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
339				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
340				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
341				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
342				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
343			drive-strength = "r0";
344			input-schmitt-enable;
345			bias-pull-up;
346			bias-pull-up-value = "47k";
347			slew-rate = "fast";
348			nxp,speed = "100-mhz";
349		};
350		group2 {
351			pinmux = <&iomuxc_gpio_b1_14_usdhc1_vselect>;
352			drive-strength = "r0-4";
353			input-schmitt-enable;
354			bias-pull-up;
355			bias-pull-up-value = "47k";
356			slew-rate = "fast";
357			nxp,speed = "100-mhz";
358		};
359		group3 {
360			pinmux = <&iomuxc_gpio_ad_b0_05_gpio1_io05>;
361			drive-strength = "r0-6";
362			slew-rate = "slow";
363			nxp,speed = "100-mhz";
364		};
365	};
366
367	/* fast pinmux settings for USDHC (over 100 Mhz) */
368	pinmux_usdhc1_fast: pinmux_usdhc1_fast {
369		group0 {
370			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
371			bias-disable;
372			drive-strength = "r0-7";
373			input-schmitt-enable;
374			slew-rate = "fast";
375			nxp,speed = "200-mhz";
376		};
377		group1 {
378			pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
379				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
380				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
381				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
382				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
383			drive-strength = "r0-7";
384			input-schmitt-enable;
385			bias-pull-up;
386			bias-pull-up-value = "47k";
387			slew-rate = "fast";
388			nxp,speed = "200-mhz";
389		};
390	};
391
392	/* medium pinmux settings for USDHC (under 100 Mhz) */
393	pinmux_usdhc1_med: pinmux_usdhc1_med {
394		group0 {
395			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
396			bias-disable;
397			drive-strength = "r0-7";
398			input-schmitt-enable;
399			slew-rate = "fast";
400			nxp,speed = "100-mhz";
401		};
402		group1 {
403			pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
404				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
405				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
406				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
407				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
408			drive-strength = "r0-7";
409			input-schmitt-enable;
410			bias-pull-up;
411			bias-pull-up-value = "47k";
412			slew-rate = "fast";
413			nxp,speed = "100-mhz";
414		};
415	};
416
417	/* slow pinmux settings for USDHC (under 50 Mhz) */
418	pinmux_usdhc1_slow: pinmux_usdhc1_slow {
419		group0 {
420			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
421			bias-disable;
422			drive-strength = "r0-7";
423			input-schmitt-enable;
424			slew-rate = "fast";
425			nxp,speed = "50-mhz";
426		};
427		group1 {
428			pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
429				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
430				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
431				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
432				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
433			drive-strength = "r0-7";
434			input-schmitt-enable;
435			bias-pull-up;
436			bias-pull-up-value = "47k";
437			slew-rate = "fast";
438			nxp,speed = "50-mhz";
439		};
440	};
441
442};
443
444