1/*
2 * Copyright (c) 2022 Laird Connectivity
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8#include <nordic/nrf52840_qiaa.dtsi>
9#include "mg100-pinctrl.dtsi"
10#include <zephyr/dt-bindings/input/input-event-codes.h>
11
12/ {
13	model = "MG100";
14	compatible = "lairdconnect,mg100";
15
16	chosen {
17		zephyr,console = &uart0;
18		zephyr,shell-uart = &uart0;
19		zephyr,uart-mcumgr = &uart0;
20		zephyr,bt-mon-uart = &uart0;
21		zephyr,sram = &sram0;
22		zephyr,flash = &flash0;
23		zephyr,code-partition = &slot0_partition;
24		zephyr,ieee802154 = &ieee802154;
25	};
26
27	leds {
28		compatible = "gpio-leds";
29		led1: led_1 {
30			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
31			label = "Red LED";
32		};
33		led2: led_2 {
34			gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
35			label = "Blue LED";
36		};
37		led3: led_3 {
38			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
39			label = "Green LED";
40		};
41	};
42
43	buttons {
44		compatible = "gpio-keys";
45		button1: button_1 {
46			gpios = <&gpio0 3 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
47			label = "Push button switch";
48			zephyr,code = <INPUT_KEY_0>;
49		};
50	};
51
52	en-sd-switch {
53		compatible = "regulator-fixed";
54		regulator-name = "en_sd_switch";
55		enable-gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
56		regulator-boot-on;
57	};
58
59	/* These aliases are provided for compatibility with samples */
60	aliases {
61		led0 = &led1;
62		led1 = &led2;
63		led2 = &led3;
64		sw0 = &button1;
65		mcuboot-button0 = &button1;
66		mcuboot-led0 = &led1;
67		watchdog0 = &wdt0;
68	};
69};
70
71&adc {
72	status = "okay";
73};
74
75&uicr {
76	gpio-as-nreset;
77};
78
79&gpiote {
80	status = "okay";
81};
82
83&gpio0 {
84	status = "okay";
85};
86
87&gpio1 {
88	status = "okay";
89};
90
91&uart0 {
92	compatible = "nordic,nrf-uart";
93	status = "okay";
94	current-speed = <115200>;
95	pinctrl-0 = <&uart0_default>;
96	pinctrl-1 = <&uart0_sleep>;
97	pinctrl-names = "default", "sleep";
98};
99
100&uart1 {
101	compatible = "nordic,nrf-uarte";
102	status = "okay";
103	current-speed = <115200>;
104	hw-flow-control;
105	pinctrl-0 = <&uart1_default>;
106	pinctrl-1 = <&uart1_sleep>;
107	pinctrl-names = "default", "sleep";
108	hl7800 {
109		compatible = "swir,hl7800";
110		status = "okay";
111		mdm-reset-gpios = <&gpio1 15 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
112		mdm-wake-gpios = <&gpio1 13 (GPIO_OPEN_SOURCE | GPIO_ACTIVE_HIGH)>;
113		mdm-pwr-on-gpios = <&gpio1 2 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
114		mdm-fast-shutd-gpios = <&gpio1 14 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
115		mdm-vgpio-gpios = <&gpio1 11 0>;
116		mdm-uart-dsr-gpios = <&gpio0 25 0>;
117		mdm-uart-cts-gpios = <&gpio0 15 0>;
118		mdm-gpio6-gpios = <&gpio1 12 0>;
119	};
120};
121
122&i2c0 {
123	compatible = "nordic,nrf-twim";
124	status = "okay";
125
126	pinctrl-0 = <&i2c0_default>;
127	pinctrl-1 = <&i2c0_sleep>;
128	pinctrl-names = "default", "sleep";
129	lis2dh@19 {
130		compatible = "st,lis3dh", "st,lis2dh";
131		status = "okay";
132		reg = <0x19>;
133		irq-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
134		anym-on-int1;
135	};
136};
137
138&spi2 {
139	compatible = "nordic,nrf-spim";
140	status = "okay";
141	pinctrl-0 = <&spi2_default>;
142	pinctrl-1 = <&spi2_sleep>;
143	pinctrl-names = "default", "sleep";
144	cs-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
145	sdhc0: sdhc@0 {
146		compatible = "zephyr,sdhc-spi-slot";
147		status = "okay";
148		reg = <0>;
149		spi-max-frequency = <8000000>;
150		mmc {
151			compatible = "zephyr,sdmmc-disk";
152			status = "okay";
153		};
154	};
155};
156
157&qspi {
158	status = "okay";
159	pinctrl-0 = <&qspi_default>;
160	pinctrl-1 = <&qspi_sleep>;
161	pinctrl-names = "default", "sleep";
162	mx25r64: mx25r6435f@0 {
163		compatible = "nordic,qspi-nor";
164		reg = <0>;
165		writeoc = "pp4io";
166		readoc = "read4io";
167		sck-frequency = <8000000>;
168		jedec-id = [ c2 28 17  ];
169		size = <67108864>;
170		has-dpd;
171		t-enter-dpd = <10000>;
172		t-exit-dpd = <35000>;
173	};
174};
175
176&ieee802154 {
177	status = "okay";
178};
179
180&flash0 {
181	partitions {
182		compatible = "fixed-partitions";
183		#address-cells = <1>;
184		#size-cells = <1>;
185
186		/* 96K */
187		boot_partition: partition@0 {
188			label = "mcuboot";
189			reg = <0x00000000 0x00018000>;
190		};
191		/* 896K */
192		slot0_partition: partition@18000 {
193			label = "image-0";
194			reg = <0x00018000 0x000E0000>;
195		};
196
197		/*
198		 * The flash starting at 0x000f8000 and ending at
199		 * 0x000fffff is reserved for use by the application.
200		 */
201
202		/*
203		 * Storage partition will be used by FCB/NVS
204		 * if enabled. 32K
205		 */
206		storage_partition: partition@f8000 {
207			label = "storage";
208			reg = <0x000f8000 0x00008000>;
209		};
210	};
211};
212
213&mx25r64 {
214	partitions {
215		compatible = "fixed-partitions";
216		#address-cells = <1>;
217		#size-cells = <1>;
218
219		/* 896K */
220		slot1_partition: partition@0 {
221			label = "image-1";
222			reg = <0x00000000 0x000E0000>;
223		};
224		/* 128K */
225		scratch_partition: partition@E0000 {
226			label = "image-scratch";
227			reg = <0x000E0000 0x00020000>;
228		};
229		/* 7MB */
230		lfs_partition: partition@100000 {
231			label = "lfs_storage";
232			reg = <0x00100000 0x00700000>;
233		};
234	};
235};
236