1/*
2 * Copyright (c) 2022 Nordic Semiconductor
3 * Copyright (c) 2022 Laird Connectivity
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7&pinctrl {
8	uart0_default: uart0_default {
9		group1 {
10			psels = <NRF_PSEL(UART_TX, 0, 6)>,
11				<NRF_PSEL(UART_RX, 0, 8)>,
12				<NRF_PSEL(UART_RTS, 0, 5)>,
13				<NRF_PSEL(UART_CTS, 0, 7)>;
14		};
15	};
16
17	uart0_sleep: uart0_sleep {
18		group1 {
19			psels = <NRF_PSEL(UART_TX, 0, 6)>,
20				<NRF_PSEL(UART_RX, 0, 8)>,
21				<NRF_PSEL(UART_RTS, 0, 5)>,
22				<NRF_PSEL(UART_CTS, 0, 7)>;
23			low-power-enable;
24		};
25	};
26
27	uart1_default: uart1_default {
28		group1 {
29			psels = <NRF_PSEL(UART_TX, 0, 14)>,
30				<NRF_PSEL(UART_RX, 0, 16)>,
31				<NRF_PSEL(UART_RTS, 0, 13)>,
32				<NRF_PSEL(UART_CTS, 0, 15)>;
33		};
34	};
35
36	uart1_sleep: uart1_sleep {
37		group1 {
38			psels = <NRF_PSEL(UART_TX, 0, 14)>,
39				<NRF_PSEL(UART_RX, 0, 16)>,
40				<NRF_PSEL(UART_RTS, 0, 13)>,
41				<NRF_PSEL(UART_CTS, 0, 15)>;
42			low-power-enable;
43		};
44	};
45
46	i2c0_default: i2c0_default {
47		group1 {
48			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
49				<NRF_PSEL(TWIM_SCL, 0, 27)>;
50		};
51	};
52
53	i2c0_sleep: i2c0_sleep {
54		group1 {
55			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
56				<NRF_PSEL(TWIM_SCL, 0, 27)>;
57			low-power-enable;
58		};
59	};
60
61	spi2_default: spi2_default {
62		group1 {
63			psels = <NRF_PSEL(SPIM_SCK, 1, 9)>,
64				<NRF_PSEL(SPIM_MOSI, 0, 11)>,
65				<NRF_PSEL(SPIM_MISO, 0, 12)>;
66		};
67	};
68
69	spi2_sleep: spi2_sleep {
70		group1 {
71			psels = <NRF_PSEL(SPIM_SCK, 1, 9)>,
72				<NRF_PSEL(SPIM_MOSI, 0, 11)>,
73				<NRF_PSEL(SPIM_MISO, 0, 12)>;
74			low-power-enable;
75		};
76	};
77
78	qspi_default: qspi_default {
79		group1 {
80			psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
81				<NRF_PSEL(QSPI_IO0, 0, 20)>,
82				<NRF_PSEL(QSPI_IO1, 0, 21)>,
83				<NRF_PSEL(QSPI_IO2, 0, 22)>,
84				<NRF_PSEL(QSPI_IO3, 0, 23)>,
85				<NRF_PSEL(QSPI_CSN, 0, 17)>;
86		};
87	};
88
89	qspi_sleep: qspi_sleep {
90		group1 {
91			psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
92				<NRF_PSEL(QSPI_IO0, 0, 20)>,
93				<NRF_PSEL(QSPI_IO1, 0, 21)>,
94				<NRF_PSEL(QSPI_IO2, 0, 22)>,
95				<NRF_PSEL(QSPI_IO3, 0, 23)>,
96				<NRF_PSEL(QSPI_CSN, 0, 17)>;
97			low-power-enable;
98		};
99	};
100
101};
102