1/* 2 * Copyright 2023 The ChromiumOS Authors 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7/dts-v1/; 8#include <st/g0/stm32g0b1Xe.dtsi> 9#include <st/g0/stm32g0b1r(b-c-e)ixn-pinctrl.dtsi> 10#include <zephyr/dt-bindings/input/input-event-codes.h> 11 12/ { 13 model = "Google Twinkie V2"; 14 compatible = "google,twinkie-v2"; 15 16 chosen { 17 zephyr,sram = &sram0; 18 zephyr,flash = &flash0; 19 }; 20 21 leds { 22 compatible = "gpio-leds"; 23 red_led_0: led0 { 24 gpios = <&gpioc 8 GPIO_ACTIVE_LOW>; 25 }; 26 green_led_1: led1 { 27 gpios = <&gpiob 6 GPIO_ACTIVE_LOW>; 28 }; 29 blue_led_2: led2 { 30 gpios = <&gpiob 7 GPIO_ACTIVE_LOW>; 31 }; 32 }; 33 34 gpio_keys { 35 compatible = "gpio-keys"; 36 37 /* does not go to an actual button in current hardware. 38 * short TP5 to TP6 to activate. 39 */ 40 dfu_detect: dfudetect { 41 gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 42 zephyr,code = <INPUT_KEY_0>; 43 }; 44 }; 45 46 cc1_buf: cc1buf { 47 compatible = "voltage-divider"; 48 io-channels = <&adc1 1>; 49 output-ohms = <2000000000>; 50 }; 51 52 cc2_buf: cc2buf { 53 compatible = "voltage-divider"; 54 io-channels = <&adc1 3>; 55 output-ohms = <2000000000>; 56 }; 57 58 vbus_read_buf: vbusv { 59 compatible = "voltage-divider"; 60 io-channels = <&adc1 15>; 61 output-ohms = <68000>; 62 full-ohms = <(2000000 + 68000)>; 63 }; 64 65 csa_vbus: vbusc { 66 compatible = "current-sense-amplifier"; 67 io-channels = <&adc1 17>; 68 sense-resistor-micro-ohms = <3000>; 69 sense-gain-mult = <100>; 70 }; 71 72 csa_cc2: vconc { 73 compatible = "current-sense-amplifier"; 74 io-channels = <&adc1 18>; 75 sense-resistor-micro-ohms = <10000>; 76 sense-gain-mult = <25>; 77 }; 78 79 aliases { 80 led0 = &red_led_0; 81 led1 = &green_led_1; 82 led2 = &blue_led_2; 83 bootloader-led0 = &blue_led_2; 84 vcc1 = &cc1_buf; 85 vcc2 = &cc2_buf; 86 vbus = &vbus_read_buf; 87 cbus = &csa_vbus; 88 ccon = &csa_cc2; 89 }; 90}; 91 92 93&adc1 { 94 #address-cells = <1>; 95 #size-cells = <0>; 96 97 pinctrl-0 = <&adc1_in1_pa1 /* CC1_BUF */ 98 &adc1_in3_pa3 /* CC2_BUF */ 99 &adc1_in15_pb11 /* VBUS_READ_BUF */ 100 &adc1_in17_pc4 /* CSA_VBUS */ 101 &adc1_in18_pc5 /* CSA_CC2 */ 102 >; 103 pinctrl-names = "default"; 104 st,adc-clock-source = <SYNC>; 105 st,adc-prescaler = <4>; 106 status = "okay"; 107 108 channel@1 { 109 reg = <1>; 110 zephyr,gain = "ADC_GAIN_1"; 111 zephyr,reference = "ADC_REF_INTERNAL"; 112 zephyr,vref-mv = <3300>; 113 zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>; 114 zephyr,resolution = <12>; 115 }; 116 117 channel@3 { 118 reg = <3>; 119 zephyr,gain = "ADC_GAIN_1"; 120 zephyr,reference = "ADC_REF_INTERNAL"; 121 zephyr,vref-mv = <3300>; 122 zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>; 123 zephyr,resolution = <12>; 124 }; 125 126 channel@15 { 127 reg = <15>; 128 zephyr,gain = "ADC_GAIN_1"; 129 zephyr,reference = "ADC_REF_INTERNAL"; 130 zephyr,vref-mv = <3300>; 131 zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>; 132 zephyr,resolution = <12>; 133 }; 134 135 channel@17 { 136 reg = <17>; 137 zephyr,gain = "ADC_GAIN_1"; 138 zephyr,reference = "ADC_REF_INTERNAL"; 139 zephyr,vref-mv = <3300>; 140 zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>; 141 zephyr,resolution = <12>; 142 }; 143 144 channel@18 { 145 reg = <18>; 146 zephyr,gain = "ADC_GAIN_1"; 147 zephyr,reference = "ADC_REF_INTERNAL"; 148 zephyr,vref-mv = <3300>; 149 zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>; 150 zephyr,resolution = <12>; 151 }; 152}; 153 154&clk_hsi { 155 status = "okay"; 156}; 157 158&pll { 159 div-m = <1>; 160 mul-n = <8>; 161 div-p = <2>; 162 div-q = <2>; 163 div-r = <2>; 164 clocks = <&clk_hsi>; 165 status = "okay"; 166}; 167 168&rcc { 169 clocks = <&pll>; 170 clock-frequency = <DT_FREQ_M(64)>; 171 ahb-prescaler = <1>; 172 apb1-prescaler = <1>; 173}; 174 175&iwdg { 176 status = "okay"; 177}; 178 179&ucpd1 { 180 status = "okay"; 181 182 psc-ucpdclk = <1>; 183 hbitclkdiv = <27>; 184 pinctrl-0 = <&ucpd1_cc1_pa8 &ucpd1_cc2_pb15>; 185 pinctrl-names = "default"; 186}; 187